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KVM: arm64: nv: Return correct RES0 bits for FGT registers

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We had extended the sysreg masking infrastructure to more general
registers, instead of restricting it to VNCR-backed registers, since
commit a016202009 ("KVM: arm64: Extend masking facility to arbitrary
registers"). Fix kvm_get_sysreg_res0() to reflect this fact.

Note that we're sure that we only deal with FGT registers in
kvm_get_sysreg_res0(), the

	if (sr < __VNCR_START__)

is actually a never false, which should probably be removed later.

Fixes: 69c19e047d ("KVM: arm64: Add TCR2_EL2 to the sysreg arrays")
Signed-off-by: Zenghui Yu (Huawei) <zenghui.yu@linux.dev>
Link: https://patch.msgid.link/20260121101631.41037-1-zenghui.yu@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
This commit is contained in:
Zenghui Yu (Huawei)
2026-01-21 18:16:31 +08:00
committed by Marc Zyngier
parent 54adbfe40e
commit 2eb80a2eee
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/kvm/emulate-nested.c
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@@ -2435,7 +2435,7 @@ static u64 kvm_get_sysreg_res0(struct kvm *kvm, enum vcpu_sysreg sr)
masks = kvm->arch.sysreg_masks;
return masks->mask[sr - __VNCR_START__].res0;
return masks->mask[sr - __SANITISED_REG_START__].res0;
}
static bool check_fgt_bit(struct kvm_vcpu *vcpu, enum vcpu_sysreg sr,