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drm/i915/ltphy: Readout ssc_enabled for LT PHY

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We need to readout the ssc_enabled param for LT PHY pll state too.
Create a function that does that, we only need to read SSC Enable PLL A
bit since that is the only one we write Xe3p onwards. While at it
improve the dump using str_yes_or_no.

Bspec: 74667
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20260701091503.1302226-2-suraj.kandpal@intel.com
This commit is contained in:
Suraj Kandpal
2026-07-01 14:45:02 +05:30
parent c2408fda34
commit 2c9a89d685
1 changed files with 12 additions and 2 deletions
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14
drivers/gpu/drm/i915/display/intel_lt_phy.c
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@@ -2178,8 +2178,9 @@ void intel_lt_phy_dump_hw_state(struct drm_printer *p,
{
int i, j;
drm_printf(p, "lt_phy_pll_hw_state: lane count: %d, ssc enabled: %d, tbt mode: %d\n",
hw_state->lane_count, hw_state->ssc_enabled, hw_state->tbt_mode);
drm_printf(p, "lt_phy_pll_hw_state: lane count: %d, ssc enabled: %s, tbt mode: %s\n",
hw_state->lane_count, str_yes_no(hw_state->ssc_enabled),
str_yes_no(hw_state->tbt_mode));
for (i = 0; i < 3; i++) {
drm_printf(p, "config[%d] = 0x%.4x,\n",
@@ -2221,6 +2222,14 @@ static bool intel_lt_phy_pll_is_enabled(struct intel_encoder *encoder)
XELPDP_LANE_PCLK_PLL_ACK(0);
}
static bool readout_ssc_state(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
return intel_de_read(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port)) &
XELPDP_SSC_ENABLE_PLLA;
}
bool intel_lt_phy_tbt_pll_readout_hw_state(struct intel_display *display,
struct intel_dpll *pll,
struct intel_dpll_hw_state *hw_state)
@@ -2250,6 +2259,7 @@ bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder);
lane = owned_lane_mask & INTEL_LT_PHY_LANE0 ? : INTEL_LT_PHY_LANE1;
wakeref = intel_lt_phy_transaction_begin(encoder);
pll_state->ssc_enabled = readout_ssc_state(encoder);
pll_state->lane_count = intel_readout_lane_count(encoder, INTEL_LT_PHY_LANE0,
INTEL_LT_PHY_LANE1);