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drm/i915/gvt: Use consist max display pipe numbers as i915 definition

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GVT implements a homogeneous vGPU as host GPU so max vGPU display pipes
can't exceed HW. The inconsistency definition has potential risks which
could cause array indexing overflow.

Remove the unnecessary define of INTEL_GVT_MAX_PIPE and align with i915.

Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Colin Xu <colin.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Colin Xu
2019-02-14 12:56:33 +08:00
committed by Zhenyu Wang
parent 39c68e87bc
commit 2c7f9a4df9
1 changed files with 1 additions and 3 deletions
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4
drivers/gpu/drm/i915/gvt/gvt.h
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@@ -111,11 +111,9 @@ struct intel_vgpu_cfg_space {
#define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space)
#define INTEL_GVT_MAX_PIPE 4
struct intel_vgpu_irq {
bool irq_warn_once[INTEL_GVT_EVENT_MAX];
DECLARE_BITMAP(flip_done_event[INTEL_GVT_MAX_PIPE],
DECLARE_BITMAP(flip_done_event[I915_MAX_PIPES],
INTEL_GVT_EVENT_MAX);
};