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ARM: dts: imx6dl-victgo: configure ethernet reference clock parent

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On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Oleksij Rempel
2023-01-31 09:46:33 +01:00
committed by Shawn Guo
parent 03c8a3c719
commit 2c23a919d6
1 changed files with 8 additions and 4 deletions
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12
arch/arm/boot/dts/imx6dl-victgo.dts
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@@ -54,6 +54,7 @@ clk50m_phy: phy-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "enet_ref_pad";
};
rotary-encoder {
@@ -134,6 +135,13 @@ vdiv_hitch_pos: voltage-divider-hitch-pos {
};
};
&clks {
clocks = <&clk50m_phy>;
clock-names = "enet_ref_pad";
assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
assigned-clock-parents = <&clk50m_phy>;
};
&ecspi2 {
cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -182,10 +190,6 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clk50m_phy>;
clock-names = "ipg", "ahb", "ptp";
phy-handle = <&rmii_phy>;
status = "okay";