drm/msm/dpu: rewrite scaler and CSC presense checks

In order to check whether the SSPP block has scaler and CSC subblocks
the funcion dpu_plane_atomic_check_pipe() uses macros which enumerate
all possible scaler and CSC features. Replace those checks with the
scaler and CSC subblock length checks in order to be able to drop those
two macros.

Suggested-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/570113/
Link: https://lore.kernel.org/r/20231201234234.2065610-9-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
2023-12-02 01:40:32 +02:00
parent aa83fa5bf6
commit 2b98aa1d65
2 changed files with 2 additions and 17 deletions

View File

@@ -21,21 +21,6 @@ struct dpu_hw_sspp;
#define DPU_SSPP_ROT_90 BIT(3)
#define DPU_SSPP_SOLID_FILL BIT(4)
/**
* Define all scaler feature bits in catalog
*/
#define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \
BIT(DPU_SSPP_SCALER_QSEED2) | \
BIT(DPU_SSPP_SCALER_QSEED3) | \
BIT(DPU_SSPP_SCALER_QSEED3LITE) | \
BIT(DPU_SSPP_SCALER_QSEED4))
/*
* Define all CSC feature bits in catalog
*/
#define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \
BIT(DPU_SSPP_CSC_10BIT))
/**
* Component indices
*/

View File

@@ -774,8 +774,8 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu,
min_src_size = DPU_FORMAT_IS_YUV(fmt) ? 2 : 1;
if (DPU_FORMAT_IS_YUV(fmt) &&
(!(pipe->sspp->cap->features & DPU_SSPP_SCALER) ||
!(pipe->sspp->cap->features & DPU_SSPP_CSC_ANY))) {
(!pipe->sspp->cap->sblk->scaler_blk.len ||
!pipe->sspp->cap->sblk->csc_blk.len)) {
DPU_DEBUG_PLANE(pdpu,
"plane doesn't have scaler/csc for yuv\n");
return -EINVAL;