staging: comedi: ni_stc.h: tidy up AO_Start_Select_Register and bits

Rename the CamelCase. Use the BIT() macro to define the bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
2015-05-01 14:59:21 -07:00
committed by Greg Kroah-Hartman
parent af5102a77e
commit 2b6285dab7
2 changed files with 13 additions and 13 deletions

View File

@@ -360,7 +360,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
[NISTC_AI_START_STOP_REG] = { 0x17c, 2 },
[NISTC_AI_TRIG_SEL_REG] = { 0x17e, 2 },
[NISTC_AI_DIV_LOADA_REG] = { 0x180, 4 },
[AO_Start_Select_Register] = { 0x184, 2 },
[NISTC_AO_START_SEL_REG] = { 0x184, 2 },
[AO_Trigger_Select_Register] = { 0x186, 2 },
[G_Autoincrement_Register(0)] = { 0x188, 2 },
[G_Autoincrement_Register(1)] = { 0x18a, 2 },
@@ -3082,7 +3082,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
#endif
ni_stc_writew(dev, bits, AO_Personal_Register);
/* enable sending of ao dma requests */
ni_stc_writew(dev, AO_AOFREQ_Enable, AO_Start_Select_Register);
ni_stc_writew(dev, NISTC_AO_START_AOFREQ_ENA, NISTC_AO_START_SEL_REG);
ni_stc_writew(dev, AO_Configuration_End, Joint_Reset_Register);
@@ -3195,7 +3195,7 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
ni_stc_writew(dev, AO_BC_Source_Select | AO_UPDATE_Pulse_Width |
AO_TMRDACWR_Pulse_Width, AO_Personal_Register);
ni_stc_writew(dev, 0, AO_Output_Control_Register);
ni_stc_writew(dev, 0, AO_Start_Select_Register);
ni_stc_writew(dev, 0, NISTC_AO_START_SEL_REG);
devpriv->ao_cmd1 = 0;
ni_stc_writew(dev, devpriv->ao_cmd1, NISTC_AO_CMD1_REG);
devpriv->ao_cmd2 = 0;

View File

@@ -338,6 +338,16 @@
#define NISTC_AI_DIV_LOADA_REG 64
#define NISTC_AO_START_SEL_REG 66
#define NISTC_AO_START_UI2_SW_GATE BIT(15)
#define NISTC_AO_START_UI2_EXT_GATE_POL BIT(14)
#define NISTC_AO_START_POLARITY BIT(13)
#define NISTC_AO_START_AOFREQ_ENA BIT(12)
#define NISTC_AO_START_UI2_EXT_GATE_SEL(x) (((x) & 0x1f) << 7)
#define NISTC_AO_START_SYNC BIT(6)
#define NISTC_AO_START_EDGE BIT(5)
#define NISTC_AO_START_SEL(x) (((x) & 0x1f) << 0)
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
@@ -396,16 +406,6 @@ enum Joint_Status_2_Bits {
#define AO_BC_Save_Registers 18
#define AO_UC_Save_Registers 20
#define AO_Start_Select_Register 66
#define AO_UI2_Software_Gate _bit15
#define AO_UI2_External_Gate_Polarity _bit14
#define AO_START_Polarity _bit13
#define AO_AOFREQ_Enable _bit12
#define AO_UI2_External_Gate_Select(a) (((a) & 0x1f) << 7)
#define AO_START_Sync _bit6
#define AO_START_Edge _bit5
#define AO_START_Select(a) ((a) & 0x1f)
#define AO_Trigger_Select_Register 67
#define AO_UI2_External_Gate_Enable _bit15
#define AO_Delayed_START1 _bit14