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bnxt_en: Use the pg_info field in bnxt_ctx_mem_type struct
Use the newly added pg_info field in bnxt_ctx_mem_type struct and remove the standalone page info structures in bnxt_ctx_mem_info. This now completes the reorganization of the context memory structures to work better with the new and more flexible firmware interface for newer chips. Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20231120234405.194542-6-michael.chan@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
committed by
Jakub Kicinski
parent
035c576159
commit
2ad67aea11
@@ -7224,11 +7224,9 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
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resp = hwrm_req_hold(bp, req);
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rc = hwrm_req_send_silent(bp, req);
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if (!rc) {
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struct bnxt_ctx_pg_info *ctx_pg;
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struct bnxt_ctx_mem_type *ctxm;
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struct bnxt_ctx_mem_info *ctx;
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u8 init_val, init_idx = 0;
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int i, tqm_rings;
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u16 init_mask;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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@@ -7311,14 +7309,6 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
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ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM];
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ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1;
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tqm_rings = ctx->tqm_fp_rings_count + BNXT_MAX_TQM_SP_RINGS;
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ctx_pg = kcalloc(tqm_rings, sizeof(*ctx_pg), GFP_KERNEL);
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if (!ctx_pg) {
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rc = -ENOMEM;
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goto ctx_err;
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}
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for (i = 0; i < tqm_rings; i++, ctx_pg++)
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ctx->tqm_mem[i] = ctx_pg;
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rc = bnxt_alloc_all_ctx_pg_info(bp, BNXT_CTX_MAX);
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} else {
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rc = 0;
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@@ -7380,8 +7370,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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req->enables = cpu_to_le32(enables);
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP) {
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ctx_pg = &ctx->qp_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_QP];
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ctx_pg = ctxm->pg_info;
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req->qp_num_entries = cpu_to_le32(ctx_pg->entries);
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req->qp_num_qp1_entries = cpu_to_le16(ctxm->qp_qp1_entries);
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req->qp_num_l2_entries = cpu_to_le16(ctxm->qp_l2_entries);
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@@ -7391,8 +7381,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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&req->qpc_page_dir);
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}
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_SRQ) {
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ctx_pg = &ctx->srq_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ];
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ctx_pg = ctxm->pg_info;
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req->srq_num_entries = cpu_to_le32(ctx_pg->entries);
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req->srq_num_l2_entries = cpu_to_le16(ctxm->srq_l2_entries);
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req->srq_entry_size = cpu_to_le16(ctxm->entry_size);
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@@ -7401,8 +7391,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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&req->srq_page_dir);
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}
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_CQ) {
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ctx_pg = &ctx->cq_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_CQ];
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ctx_pg = ctxm->pg_info;
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req->cq_num_entries = cpu_to_le32(ctx_pg->entries);
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req->cq_num_l2_entries = cpu_to_le16(ctxm->cq_l2_entries);
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req->cq_entry_size = cpu_to_le16(ctxm->entry_size);
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@@ -7411,8 +7401,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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&req->cq_page_dir);
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}
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_VNIC) {
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ctx_pg = &ctx->vnic_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC];
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ctx_pg = ctxm->pg_info;
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req->vnic_num_vnic_entries = cpu_to_le16(ctxm->vnic_entries);
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req->vnic_num_ring_table_entries =
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cpu_to_le16(ctxm->max_entries - ctxm->vnic_entries);
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@@ -7422,8 +7412,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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&req->vnic_page_dir);
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}
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_STAT) {
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ctx_pg = &ctx->stat_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_STAT];
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ctx_pg = ctxm->pg_info;
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req->stat_num_entries = cpu_to_le32(ctxm->max_entries);
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req->stat_entry_size = cpu_to_le16(ctxm->entry_size);
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bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
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@@ -7433,8 +7423,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV) {
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u32 units;
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ctx_pg = &ctx->mrav_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV];
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ctx_pg = ctxm->pg_info;
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req->mrav_num_entries = cpu_to_le32(ctx_pg->entries);
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units = ctxm->mrav_num_entries_units;
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if (units) {
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@@ -7452,8 +7442,8 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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&req->mrav_page_dir);
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}
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM) {
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ctx_pg = &ctx->tim_mem;
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ctxm = &ctx->ctx_arr[BNXT_CTX_TIM];
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ctx_pg = ctxm->pg_info;
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req->tim_num_entries = cpu_to_le32(ctx_pg->entries);
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req->tim_entry_size = cpu_to_le16(ctxm->entry_size);
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bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
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@@ -7464,14 +7454,15 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
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for (i = 0, num_entries = &req->tqm_sp_num_entries,
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pg_attr = &req->tqm_sp_pg_size_tqm_sp_lvl,
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pg_dir = &req->tqm_sp_page_dir,
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ena = FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP;
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ena = FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP,
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ctx_pg = ctxm->pg_info;
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i < BNXT_MAX_TQM_RINGS;
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ctx_pg = &ctx->ctx_arr[BNXT_CTX_FTQM].pg_info[i],
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i++, num_entries++, pg_attr++, pg_dir++, ena <<= 1) {
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if (!(enables & ena))
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continue;
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req->tqm_entry_size = cpu_to_le16(ctxm->entry_size);
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ctx_pg = ctx->tqm_mem[i];
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*num_entries = cpu_to_le32(ctx_pg->entries);
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bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, pg_attr, pg_dir);
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}
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@@ -7587,30 +7578,23 @@ void bnxt_free_ctx_mem(struct bnxt *bp)
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{
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struct bnxt_ctx_mem_info *ctx = bp->ctx;
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u16 type;
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int i;
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if (!ctx)
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return;
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if (ctx->tqm_mem[0]) {
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for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++)
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bnxt_free_ctx_pg_tbls(bp, ctx->tqm_mem[i]);
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kfree(ctx->tqm_mem[0]);
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ctx->tqm_mem[0] = NULL;
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}
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bnxt_free_ctx_pg_tbls(bp, &ctx->tim_mem);
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bnxt_free_ctx_pg_tbls(bp, &ctx->mrav_mem);
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bnxt_free_ctx_pg_tbls(bp, &ctx->stat_mem);
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bnxt_free_ctx_pg_tbls(bp, &ctx->vnic_mem);
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bnxt_free_ctx_pg_tbls(bp, &ctx->cq_mem);
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bnxt_free_ctx_pg_tbls(bp, &ctx->srq_mem);
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bnxt_free_ctx_pg_tbls(bp, &ctx->qp_mem);
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for (type = 0; type < BNXT_CTX_MAX; type++) {
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struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];
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struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info;
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int i, n = 1;
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kfree(ctxm->pg_info);
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if (!ctx_pg)
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continue;
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if (ctxm->instance_bmap)
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n = hweight32(ctxm->instance_bmap);
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for (i = 0; i < n; i++)
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bnxt_free_ctx_pg_tbls(bp, &ctx_pg[i]);
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kfree(ctx_pg);
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ctxm->pg_info = NULL;
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}
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@@ -7658,7 +7642,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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}
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ctxm = &ctx->ctx_arr[BNXT_CTX_QP];
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ctx_pg = &ctx->qp_mem;
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ctx_pg = ctxm->pg_info;
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ctx_pg->entries = l2_qps + qp1_qps + extra_qps;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -7668,7 +7652,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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}
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ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ];
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ctx_pg = &ctx->srq_mem;
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ctx_pg = ctxm->pg_info;
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ctx_pg->entries = srqs + extra_srqs;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -7678,7 +7662,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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}
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ctxm = &ctx->ctx_arr[BNXT_CTX_CQ];
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ctx_pg = &ctx->cq_mem;
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ctx_pg = ctxm->pg_info;
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ctx_pg->entries = ctxm->cq_l2_entries + extra_qps * 2;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -7688,7 +7672,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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}
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ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC];
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ctx_pg = &ctx->vnic_mem;
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ctx_pg = ctxm->pg_info;
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ctx_pg->entries = ctxm->max_entries;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -7698,7 +7682,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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}
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ctxm = &ctx->ctx_arr[BNXT_CTX_STAT];
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ctx_pg = &ctx->stat_mem;
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ctx_pg = ctxm->pg_info;
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ctx_pg->entries = ctxm->max_entries;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -7712,7 +7696,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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goto skip_rdma;
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ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV];
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ctx_pg = &ctx->mrav_mem;
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ctx_pg = ctxm->pg_info;
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/* 128K extra is needed to accommodate static AH context
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* allocation by f/w.
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*/
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@@ -7732,7 +7716,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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ena = FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV;
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ctxm = &ctx->ctx_arr[BNXT_CTX_TIM];
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ctx_pg = &ctx->tim_mem;
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ctx_pg = ctxm->pg_info;
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ctx_pg->entries = l2_qps + qp1_qps + extra_qps;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -7751,8 +7735,8 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
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entries = l2_qps + 2 * (extra_qps + qp1_qps);
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entries = roundup(entries, ctxm->entry_multiple);
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entries = clamp_t(u32, entries, min, ctxm->max_entries);
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for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++) {
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ctx_pg = ctx->tqm_mem[i];
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for (i = 0, ctx_pg = ctxm->pg_info; i < ctx->tqm_fp_rings_count + 1;
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ctx_pg = &ctx->ctx_arr[BNXT_CTX_FTQM].pg_info[i], i++) {
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ctx_pg->entries = i ? entries : entries_sp;
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if (ctxm->entry_size) {
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mem_size = ctxm->entry_size * ctx_pg->entries;
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@@ -1609,15 +1609,6 @@ struct bnxt_ctx_mem_info {
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u32 flags;
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#define BNXT_CTX_FLAG_INITED 0x01
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struct bnxt_ctx_mem_type ctx_arr[BNXT_CTX_MAX];
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struct bnxt_ctx_pg_info qp_mem;
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struct bnxt_ctx_pg_info srq_mem;
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struct bnxt_ctx_pg_info cq_mem;
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struct bnxt_ctx_pg_info vnic_mem;
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struct bnxt_ctx_pg_info stat_mem;
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struct bnxt_ctx_pg_info mrav_mem;
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struct bnxt_ctx_pg_info tim_mem;
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struct bnxt_ctx_pg_info *tqm_mem[BNXT_MAX_TQM_RINGS];
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};
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enum bnxt_health_severity {
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