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iommu/arm-smmu-v3: Correct COHACC override message
Slightly confusingly, when reporting a mismatch of the ID register value, we still refer to the IORT COHACC override flag as the "dma-coherent property" if we booted with ACPI. Update the message to be firmware-agnostic in line with SMMUv2. Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reported-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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Will Deacon
parent
9cff86fd2b
commit
2a22baa2d1
@@ -2535,7 +2535,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
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* register, but warn on mismatch.
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*/
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if (!!(reg & IDR0_COHACC) != coherent)
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dev_warn(smmu->dev, "IDR0.COHACC overridden by dma-coherent property (%s)\n",
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dev_warn(smmu->dev, "IDR0.COHACC overridden by FW configuration (%s)\n",
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coherent ? "true" : "false");
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switch (reg & IDR0_STALL_MODEL_MASK << IDR0_STALL_MODEL_SHIFT) {
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