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ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes

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Commit 370f696e44 ("dt-bindings: serial: snps-dw-apb-uart: add dma &
dma-names properties") documented dma-names property to handle Allwinner
D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the
reverse of what a bunch of different boards expect.

The initial proposed solution was to allow a flexible dma-names order in
the binding, due to potential ABI breakage concerns after fixing the DTS
files. But luckily the Allwinner boards are not affected, since they are
using a shared DMA channel for rx and tx.

Hence, the first step in fixing the inconsistency was to change
dma-names order in the binding to tx->rx.

Do the same for the snps,dw-apb-uart nodes in the DTS file.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20230321215624.78383-6-cristian.ciocaltea@collabora.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Cristian Ciocaltea
2023-03-21 23:56:19 +02:00
committed by Greg Kroah-Hartman
parent 646a203a66
commit 28cbc3a447
1 changed files with 4 additions and 4 deletions
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8
arch/arm/boot/dts/sunxi-h3-h5.dtsi
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@@ -710,7 +710,7 @@ uart0: serial@1c28000 {
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@@ -723,7 +723,7 @@ uart1: serial@1c28400 {
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@@ -736,7 +736,7 @@ uart2: serial@1c28800 {
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};
@@ -749,7 +749,7 @@ uart3: serial@1c28c00 {
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
status = "disabled";
};