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drm/tegra: dsi: Re-add clear enable register if DSI was powered by bootloader
Original commitb22fd0b963("drm/tegra: dsi: Clear enable register if powered by bootloader") was added to address the issue of DSI being in an unknown state after the bootloader, ensuring correct panel configuration. This worked fairly well under the assumption that the bootloader had set up DSI; however, in cases where it did not, the device would hang because a DSI read was called before the DSI hardware was ready. Removing this workaround results in the issue described in the original fix: the panel initialization sequence fails and the panel gets stuck in an undefined state. This is especially noticeable with command mode panels In order to properly address this issue, the original workaround is restored and placed after the DSI hardware is prepared for R/W operations. This fixes behavior for both cases: where DSI is set by the bootloader and where DSI is untouched. I have tested this change on Tegra20 (Motorola Atrix 4G), Tegra114 (NVIDIA Tegra Note 7 and ASUS Transformer Pad TF701T), and Tegra124 (Xiaomi Mi Pad) with U-Boot, using both bootloader-initialized DSI and untouched DSI. Fixes:b22fd0b963("drm/tegra: dsi: Clear enable register if powered by bootloader") Fixes:660b299bed("Revert "drm/tegra: dsi: Clear enable register if powered by bootloader"") Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patch.msgid.link/20260511074538.24563-3-clamor95@gmail.com
This commit is contained in:
committed by
Thierry Reding
parent
39e535c95f
commit
27a58cc1a9
@@ -936,6 +936,15 @@ static void tegra_dsi_encoder_enable(struct drm_encoder *encoder)
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return;
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}
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/* If the bootloader enabled DSI it needs to be disabled
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* in order for the panel initialization commands to be
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* properly sent.
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*/
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value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);
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if (value & DSI_POWER_CONTROL_ENABLE)
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tegra_dsi_disable(dsi);
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state = tegra_dsi_get_state(dsi);
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tegra_dsi_set_timeout(dsi, state->bclk, state->vrefresh);
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