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net: stmmac: dwmac-loongson: Add new multi-chan IP core support
Add a new multi-chan IP core (0x12) support which is used in Loongson- 2K3000/Loongson-3B6000M. Compared with the 0x10 core, the new 0x12 core reduces channel numbers from 8 to 4, but checksum is supported for all channels. Add a "multichan" flag to loongson_data, so that we can simply use a "if (ld->multichan)" condition rather than the complicated condition "if (ld->loongson_id == DWMAC_CORE_MULTICHAN_V1 || ld->loongson_id == DWMAC_CORE_MULTICHAN_V2)". Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Henry Chen <chenx97@aosc.io> Tested-by: Biao Dong <dongbiao@loongson.cn> Signed-off-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Reviewed-by: Yanteng Si <si.yanteng@linux.dev> Link: https://patch.msgid.link/20250424072209.3134762-3-chenhuacai@loongson.cn Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
committed by
Jakub Kicinski
parent
e527e89149
commit
2725fc2e0b
@@ -68,10 +68,11 @@
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#define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03
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#define PCI_DEVICE_ID_LOONGSON_GNET 0x7a13
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#define DWMAC_CORE_LS_MULTICHAN 0x10 /* Loongson custom ID */
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#define CHANNEL_NUM 8
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#define DWMAC_CORE_MULTICHAN_V1 0x10 /* Loongson custom ID 0x10 */
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#define DWMAC_CORE_MULTICHAN_V2 0x12 /* Loongson custom ID 0x12 */
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struct loongson_data {
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u32 multichan;
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u32 loongson_id;
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struct device *dev;
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};
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@@ -119,18 +120,29 @@ static void loongson_default_data(struct pci_dev *pdev,
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plat->dma_cfg->pbl = 32;
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plat->dma_cfg->pblx8 = true;
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if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) {
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plat->rx_queues_to_use = CHANNEL_NUM;
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plat->tx_queues_to_use = CHANNEL_NUM;
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switch (ld->loongson_id) {
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case DWMAC_CORE_MULTICHAN_V1:
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ld->multichan = 1;
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plat->rx_queues_to_use = 8;
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plat->tx_queues_to_use = 8;
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/* Only channel 0 supports checksum,
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* so turn off checksum to enable multiple channels.
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*/
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for (int i = 1; i < CHANNEL_NUM; i++)
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for (int i = 1; i < 8; i++)
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plat->tx_queues_cfg[i].coe_unsupported = 1;
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} else {
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break;
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case DWMAC_CORE_MULTICHAN_V2:
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ld->multichan = 1;
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plat->rx_queues_to_use = 4;
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plat->tx_queues_to_use = 4;
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break;
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default:
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ld->multichan = 0;
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plat->tx_queues_to_use = 1;
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plat->rx_queues_to_use = 1;
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break;
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}
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}
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@@ -328,14 +340,14 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)
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return NULL;
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/* The Loongson GMAC and GNET devices are based on the DW GMAC
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* v3.50a and v3.73a IP-cores. But the HW designers have changed the
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* GMAC_VERSION.SNPSVER field to the custom 0x10 value on the
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* network controllers with the multi-channels feature
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* v3.50a and v3.73a IP-cores. But the HW designers have changed
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* the GMAC_VERSION.SNPSVER field to the custom 0x10/0x12 value
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* on the network controllers with the multi-channels feature
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* available to emphasize the differences: multiple DMA-channels,
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* AV feature and GMAC_INT_STATUS CSR flags layout. Get back the
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* original value so the correct HW-interface would be selected.
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*/
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if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) {
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if (ld->multichan) {
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priv->synopsys_id = DWMAC_CORE_3_70;
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*dma = dwmac1000_dma_ops;
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dma->init_chan = loongson_dwmac_dma_init_channel;
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@@ -356,13 +368,13 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)
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if (mac->multicast_filter_bins)
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mac->mcast_bits_log2 = ilog2(mac->multicast_filter_bins);
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/* Loongson GMAC doesn't support the flow control. LS2K2000
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* GNET doesn't support the half-duplex link mode.
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/* Loongson GMAC doesn't support the flow control. Loongson GNET
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* without multi-channel doesn't support the half-duplex link mode.
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*/
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if (pdev->device == PCI_DEVICE_ID_LOONGSON_GMAC) {
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mac->link.caps = MAC_10 | MAC_100 | MAC_1000;
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} else {
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if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN)
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if (ld->multichan)
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mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
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MAC_10 | MAC_100 | MAC_1000;
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else
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@@ -391,9 +403,11 @@ static int loongson_dwmac_msi_config(struct pci_dev *pdev,
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struct plat_stmmacenet_data *plat,
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struct stmmac_resources *res)
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{
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int i, ret, vecs;
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int i, ch_num, ret, vecs;
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vecs = roundup_pow_of_two(CHANNEL_NUM * 2 + 1);
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ch_num = min(plat->tx_queues_to_use, plat->rx_queues_to_use);
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vecs = roundup_pow_of_two(ch_num * 2 + 1);
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ret = pci_alloc_irq_vectors(pdev, vecs, vecs, PCI_IRQ_MSI);
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if (ret < 0) {
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dev_warn(&pdev->dev, "Failed to allocate MSI IRQs\n");
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@@ -402,14 +416,12 @@ static int loongson_dwmac_msi_config(struct pci_dev *pdev,
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res->irq = pci_irq_vector(pdev, 0);
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for (i = 0; i < plat->rx_queues_to_use; i++) {
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res->rx_irq[CHANNEL_NUM - 1 - i] =
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pci_irq_vector(pdev, 1 + i * 2);
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for (i = 0; i < ch_num; i++) {
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res->rx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 1 + i * 2);
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}
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for (i = 0; i < plat->tx_queues_to_use; i++) {
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res->tx_irq[CHANNEL_NUM - 1 - i] =
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pci_irq_vector(pdev, 2 + i * 2);
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for (i = 0; i < ch_num; i++) {
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res->tx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 2 + i * 2);
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}
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plat->flags |= STMMAC_FLAG_MULTI_MSI_EN;
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@@ -571,7 +583,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
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goto err_disable_device;
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/* Use the common MAC IRQ if per-channel MSIs allocation failed */
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if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN)
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if (ld->multichan)
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loongson_dwmac_msi_config(pdev, plat, &res);
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ret = stmmac_dvr_probe(&pdev->dev, plat, &res);
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@@ -583,7 +595,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
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err_plat_clear:
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if (dev_of_node(&pdev->dev))
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loongson_dwmac_dt_clear(pdev, plat);
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if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN)
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if (ld->multichan)
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loongson_dwmac_msi_clear(pdev);
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err_disable_device:
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pci_disable_device(pdev);
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@@ -602,7 +614,7 @@ static void loongson_dwmac_remove(struct pci_dev *pdev)
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if (dev_of_node(&pdev->dev))
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loongson_dwmac_dt_clear(pdev, priv->plat);
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if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN)
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if (ld->multichan)
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loongson_dwmac_msi_clear(pdev);
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pci_disable_device(pdev);
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