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KVM: arm64: Add kvm_has_s1poe() helper
Just like we have kvm_has_s1pie(), add its S1POE counterpart, making the code slightly more readable. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20241023145345.1613824-31-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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Oliver Upton
parent
f7575530df
commit
26e89dccdf
@@ -1525,4 +1525,7 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);
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#define kvm_has_s1pie(k) \
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(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1PIE, IMP))
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#define kvm_has_s1poe(k) \
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(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))
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#endif /* __ARM64_KVM_HOST_H__ */
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@@ -80,7 +80,7 @@ static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt)
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return false;
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vcpu = ctxt_to_vcpu(ctxt);
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return kvm_has_feat(kern_hyp_va(vcpu->kvm), ID_AA64MMFR3_EL1, S1POE, IMP);
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return kvm_has_s1poe(kern_hyp_va(vcpu->kvm));
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}
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static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
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@@ -1107,7 +1107,7 @@ int kvm_init_nv_sysregs(struct kvm *kvm)
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res0 |= HFGxTR_EL2_nRCWMASK_EL1;
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if (!kvm_has_s1pie(kvm))
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res0 |= (HFGxTR_EL2_nPIRE0_EL1 | HFGxTR_EL2_nPIR_EL1);
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if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))
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if (!kvm_has_s1poe(kvm))
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res0 |= (HFGxTR_EL2_nPOR_EL0 | HFGxTR_EL2_nPOR_EL1);
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if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S2POE, IMP))
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res0 |= HFGxTR_EL2_nS2POR_EL1;
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@@ -1217,7 +1217,7 @@ int kvm_init_nv_sysregs(struct kvm *kvm)
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res0 |= TCR2_EL2_PTTWI | TCR2_EL2_PnCH;
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if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, AIE, IMP))
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res0 |= TCR2_EL2_AIE;
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if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))
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if (!kvm_has_s1poe(kvm))
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res0 |= TCR2_EL2_POE | TCR2_EL2_E0POE;
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if (!kvm_has_s1pie(kvm))
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res0 |= TCR2_EL2_PIE;
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@@ -2323,7 +2323,7 @@ static bool access_zcr_el2(struct kvm_vcpu *vcpu,
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static unsigned int s1poe_visibility(const struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *rd)
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{
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if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, S1POE, IMP))
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if (kvm_has_s1poe(vcpu->kvm))
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return 0;
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return REG_HIDDEN;
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@@ -4862,7 +4862,7 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu)
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kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPIRE0_EL1 |
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HFGxTR_EL2_nPIR_EL1);
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if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))
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if (!kvm_has_s1poe(kvm))
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kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 |
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HFGxTR_EL2_nPOR_EL0);
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