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arm64: dts: imx93: add "fsl,imx8ulp-lpuart" compatible for imx93

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i.MX93 and i.MX8ULP lpuart add some new featurs based on i.MX7ULP, for
example, i.MX93 and i.MX8ULP can support EOP(end-of-packet) function
while i.MX7ULP doesn't support, so add "fsl,imx8ulp-lpuart" compatible
string for i.MX93 to support those new features.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Sherry Sun
2023-06-27 10:53:31 +08:00
committed by Shawn Guo
parent f1bcefdef1
commit 258bd86381
1 changed files with 8 additions and 8 deletions
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16
arch/arm64/boot/dts/freescale/imx93.dtsi
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@@ -291,7 +291,7 @@ lpspi2: spi@44370000 {
};
lpuart1: serial@44380000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x44380000 0x1000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART1_GATE>;
@@ -300,7 +300,7 @@ lpuart1: serial@44380000 {
};
lpuart2: serial@44390000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x44390000 0x1000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART2_GATE>;
@@ -545,7 +545,7 @@ lpspi4: spi@42560000 {
};
lpuart3: serial@42570000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42570000 0x1000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART3_GATE>;
@@ -554,7 +554,7 @@ lpuart3: serial@42570000 {
};
lpuart4: serial@42580000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42580000 0x1000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART4_GATE>;
@@ -563,7 +563,7 @@ lpuart4: serial@42580000 {
};
lpuart5: serial@42590000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42590000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART5_GATE>;
@@ -572,7 +572,7 @@ lpuart5: serial@42590000 {
};
lpuart6: serial@425a0000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x425a0000 0x1000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART6_GATE>;
@@ -610,7 +610,7 @@ flexspi1: spi@425e0000 {
};
lpuart7: serial@42690000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42690000 0x1000>;
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART7_GATE>;
@@ -619,7 +619,7 @@ lpuart7: serial@42690000 {
};
lpuart8: serial@426a0000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x426a0000 0x1000>;
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART8_GATE>;