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ARM: dts: renesas: r7s72100: Add boot phase tags

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bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.  Add bootph-all for all nodes that are used in the
bootloader on Renesas RZ/A1 SoCs.

All SoCs require BSC bus, PFC pin control, and OSTM0 timer access during
all stages of the boot process, those are marked using bootph-all
property, and so is the SoC bus node which contains the PFC and OSTM
IPs.

Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250806150448.9669-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Marek Vasut
2025-08-06 17:04:27 +02:00
committed by Geert Uytterhoeven
parent 95319aaa3f
commit 256feb5be4
4 changed files with 12 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/renesas/r7s72100-genmai.dts
View File

@@ -203,6 +203,7 @@ &mtu2 {
};
&ostm0 {
bootph-all;
status = "okay";
};
@@ -258,6 +259,7 @@ mmcif_pins: mmcif {
};
scif2_pins: serial2 {
bootph-all;
/* P3_0 as TxD2; P3_2 as RxD2 */
pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
};
@@ -286,7 +288,7 @@ &rtc {
&scif2 {
pinctrl-names = "default";
pinctrl-0 = <&scif2_pins>;
bootph-all;
status = "okay";
};

4
arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts
View File

@@ -59,6 +59,7 @@ led1 {
&pinctrl {
scif2_pins: serial2 {
bootph-all;
/* P6_2 as RxD2; P6_3 as TxD2 */
pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
};
@@ -99,6 +100,7 @@ &mtu2 {
};
&ostm0 {
bootph-all;
status = "okay";
};
@@ -109,7 +111,7 @@ &ostm1 {
&scif2 {
pinctrl-names = "default";
pinctrl-0 = <&scif2_pins>;
bootph-all;
status = "okay";
};

3
arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts
View File

@@ -199,6 +199,7 @@ keyboard_pins: keyboard {
/* Serial Console */
scif2_pins: serial2 {
bootph-all;
pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */
<RZA1_PINMUX(3, 2, 4)>; /* RxD2 */
};
@@ -264,6 +265,7 @@ &sdhi1 {
};
&ostm0 {
bootph-all;
status = "okay";
};
@@ -278,6 +280,7 @@ &rtc {
&scif2 {
pinctrl-names = "default";
pinctrl-0 = <&scif2_pins>;
bootph-all;
status = "okay";
};

3
arch/arm/boot/dts/renesas/r7s72100.dtsi
View File

@@ -41,6 +41,7 @@ bsc: bus {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x18000000>;
bootph-all;
};
cpus {
@@ -107,6 +108,7 @@ soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
bootph-all;
L2: cache-controller@3ffff000 {
compatible = "arm,pl310-cache";
@@ -557,6 +559,7 @@ R7S72100_CLK_SDHI10 R7S72100_CLK_SDHI11
pinctrl: pinctrl@fcfe3000 {
compatible = "renesas,r7s72100-ports";
bootph-all;
reg = <0xfcfe3000 0x4230>;