drm/amd/display: update GSP1 generic info packet for PSRSU

Base on PSRSU specification, every seletive update frame need to use two
SDP to indicate the frame active range. So we occupy another GSP1 for
PSRSU execution.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Po-Ting Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Po-Ting Chen
2021-02-26 15:48:02 +08:00
committed by Alex Deucher
parent 3ac73f1ef2
commit 255ce8f7c1

View File

@@ -436,6 +436,21 @@ void enc3_stream_encoder_update_dp_info_packets(
&info_frame->vsc,
true);
}
/* TODO: VSC SDP at packetIndex 1 should be retricted only if PSR-SU on.
* There should have another Infopacket type (e.g. vsc_psrsu) for PSR_SU.
* In addition, currently the driver check the valid bit then update and
* send the corresponding Infopacket. For PSR-SU, the SDP only be sent
* while entering PSR-SU mode. So we need another parameter(e.g. send)
* in dc_info_packet to indicate which infopacket should be enabled by
* default here.
*/
if (info_frame->vsc.valid) {
enc->vpg->funcs->update_generic_info_packet(
enc->vpg,
1, /* packetIndex */
&info_frame->vsc,
true);
}
/* TODO: VSC SDP at packetIndex 1 should be restricted only if PSR-SU on.
* There should have another Infopacket type (e.g. vsc_psrsu) for PSR_SU.
* In addition, currently the driver check the valid bit then update and