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iio: adc: ad7768-1: set MOSI idle state to prevent accidental reset

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Datasheet recommends Setting the MOSI idle state to high in order to
prevent accidental reset of the device when SCLK is free running.
This happens when the controller clocks out a 1 followed by 63 zeros
while the CS is held low.

Check if SPI controller supports SPI_MOSI_IDLE_HIGH flag and set it.

Fixes: a5f8c7da3d ("iio: adc: Add AD7768-1 ADC basic support")
Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com>
Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Link: https://patch.msgid.link/c2a2b0f3d54829079763a5511359a1fa80516cfb.1741268122.git.Jonathan.Santos@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Jonathan Santos
2025-03-06 18:00:43 -03:00
committed by Jonathan Cameron
parent 8236644f5e
commit 2416cec859
1 changed files with 15 additions and 0 deletions
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15
drivers/iio/adc/ad7768-1.c
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@@ -572,6 +572,21 @@ static int ad7768_probe(struct spi_device *spi)
return -ENOMEM;
st = iio_priv(indio_dev);
/*
* Datasheet recommends SDI line to be kept high when data is not being
* clocked out of the controller and the spi clock is free running,
* to prevent accidental reset.
* Since many controllers do not support the SPI_MOSI_IDLE_HIGH flag
* yet, only request the MOSI idle state to enable if the controller
* supports it.
*/
if (spi->controller->mode_bits & SPI_MOSI_IDLE_HIGH) {
spi->mode |= SPI_MOSI_IDLE_HIGH;
ret = spi_setup(spi);
if (ret < 0)
return ret;
}
st->spi = spi;
st->vref = devm_regulator_get(&spi->dev, "vref");