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Merge tag 'mvebu-dt64-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

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mvebu dt64 for 6.7 (part 1)

Declare switch on eDPU (Armada 3720 based)
Use proper suffix -gpios for SFP GPIO properties on uDPU (Armada 3720 based)
Use appropriate label for spi1 pins on cn9310 boards

* tag 'mvebu-dt64-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: eDPU: add support for version with external switch
  arm64: dts: marvell: uDPU: rename the SFP GPIO properties
  ARM64: dts: marvell: cn9310: Use appropriate label for spi1 pins

Link: https://lore.kernel.org/r/8734y6aaqb.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-10-23 21:05:00 +02:00
parent 2707977650 660b8b2f39
commit 23b336e982
4 changed files with 55 additions and 8 deletions
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47
arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
View File

@@ -12,3 +12,50 @@ / {
&eth0 {
phy-mode = "2500base-x";
};
/*
* External MV88E6361 switch is only available on v2 of the board.
* U-Boot will enable the MDIO bus and switch nodes.
*/
&mdio {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&smi_pins>;
/* Actual device is MV88E6361 */
switch: switch@0 {
compatible = "marvell,mv88e6190";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "2500base-x";
managed = "in-band-status";
ethernet = <&eth0>;
};
port@9 {
reg = <9>;
label = "downlink";
phy-mode = "2500base-x";
managed = "in-band-status";
};
port@a {
reg = <10>;
label = "uplink";
phy-mode = "2500base-x";
managed = "in-band-status";
sfp = <&sfp_eth1>;
};
};
};
};

8
arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi
View File

@@ -61,10 +61,10 @@ led-alarm2 {
sfp_eth1: sfp-eth1 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
los-gpios = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&gpiosb 8 GPIO_ACTIVE_LOW>;
tx-disable-gpios = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <3000>;
};
};

4
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
View File

@@ -120,7 +120,7 @@ cp0_sdhci_pins: cp0-sdhi-pins-0 {
"mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
cp0_spi0_pins: cp0-spi-pins-0 {
cp0_spi1_pins: cp0-spi-pins-1 {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
@@ -170,7 +170,7 @@ &cp0_sdhci0 {
&cp0_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi0_pins>;
pinctrl-0 = <&cp0_spi1_pins>;
reg = <0x700680 0x50>, /* control */
<0x2000000 0x1000000>; /* CS0 */
status = "okay";

4
arch/arm64/boot/dts/marvell/cn9130-db.dtsi
View File

@@ -307,7 +307,7 @@ &cp0_sdhci0 {
&cp0_spi1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi0_pins>;
pinctrl-0 = <&cp0_spi1_pins>;
reg = <0x700680 0x50>;
flash@0 {
@@ -371,7 +371,7 @@ cp0_sdhci_pins: cp0-sdhi-pins-0 {
"mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
cp0_spi0_pins: cp0-spi-pins-0 {
cp0_spi1_pins: cp0-spi-pins-1 {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};