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irqchip/irq-vt8500: Split up ack/mask functions

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vt8500_irq_mask() really does the ACK for edge triggered interrupts and the
MASK for level triggered interrupts.  Edge triggered interrupts never
really are masked as a result, and there is unnecessary reading of the
status register before the ACK even though it's write-one-to-clear.

Split it up into a proper standalone vt8500_irq_ack() and an unconditional
vt8500_irq_mask().

No Fixes tag added, as it has survived this way for 15 years and nobody
complained, so apparently nothing really used edge triggered interrupts
anyway.

[ tglx: Tabularize the irqchip struct initializer ]

Signed-off-by: Alexey Charkov <alchark@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250506-vt8500-intc-updates-v2-1-a3a0606cf92d@gmail.com
This commit is contained in:
Alexey Charkov
2025-05-06 16:46:14 +04:00
committed by Thomas Gleixner
parent 76b66e8c9d
commit 22111fdf11
1 changed files with 18 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
drivers/irqchip/irq-vt8500.c
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@@ -67,25 +67,25 @@ struct vt8500_irq_data {
static struct vt8500_irq_data intc[VT8500_INTC_MAX];
static u32 active_cnt = 0;
static void vt8500_irq_mask(struct irq_data *d)
static void vt8500_irq_ack(struct irq_data *d)
{
struct vt8500_irq_data *priv = d->domain->host_data;
void __iomem *base = priv->base;
void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4);
u8 edge, dctr;
u32 status;
u32 status = (1 << (d->hwirq & 0x1f));
edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE;
if (edge) {
status = readl(stat_reg);
writel(status, stat_reg);
}
status |= (1 << (d->hwirq & 0x1f));
writel(status, stat_reg);
} else {
dctr = readb(base + VT8500_ICDC + d->hwirq);
dctr &= ~VT8500_INT_ENABLE;
writeb(dctr, base + VT8500_ICDC + d->hwirq);
}
static void vt8500_irq_mask(struct irq_data *d)
{
struct vt8500_irq_data *priv = d->domain->host_data;
void __iomem *base = priv->base;
u8 dctr;
dctr = readb(base + VT8500_ICDC + d->hwirq);
dctr &= ~VT8500_INT_ENABLE;
writeb(dctr, base + VT8500_ICDC + d->hwirq);
}
static void vt8500_irq_unmask(struct irq_data *d)
@@ -130,11 +130,11 @@ static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
}
static struct irq_chip vt8500_irq_chip = {
.name = "vt8500",
.irq_ack = vt8500_irq_mask,
.irq_mask = vt8500_irq_mask,
.irq_unmask = vt8500_irq_unmask,
.irq_set_type = vt8500_irq_set_type,
.name = "vt8500",
.irq_ack = vt8500_irq_ack,
.irq_mask = vt8500_irq_mask,
.irq_unmask = vt8500_irq_unmask,
.irq_set_type = vt8500_irq_set_type,
};
static void __init vt8500_init_irq_hw(void __iomem *base)