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drm/msm/dpu: get rid of DPU_MIXER_COMBINED_ALPHA

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Continue migration to the MDSS-revision based checks and replace
DPU_MIXER_COMBINED_ALPHA feature bit with the core_major_ver >= 4 check.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655398/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-21-3b2085a07884@oss.qualcomm.com
This commit is contained in:
Dmitry Baryshkov
2025-05-22 22:03:40 +03:00
committed by Dmitry Baryshkov
parent ff63c4a486
commit 2154cff630
5 changed files with 9 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
View File

@@ -90,10 +90,10 @@
(BIT(DPU_MIXER_SOURCESPLIT))
#define MIXER_SDM845_MASK \
(BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
(BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))
#define MIXER_QCM2290_MASK \
(BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
(BIT(DPU_DIM_LAYER))
#define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \
BIT(DPU_WB_UBWC) | \

2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
View File

@@ -85,7 +85,6 @@ enum {
* @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
* @DPU_MIXER_GC Gamma correction block
* @DPU_DIM_LAYER Layer mixer supports dim layer
* @DPU_MIXER_COMBINED_ALPHA Layer mixer has combined alpha register
* @DPU_MIXER_MAX maximum value
*/
enum {
@@ -93,7 +92,6 @@ enum {
DPU_MIXER_SOURCESPLIT,
DPU_MIXER_GC,
DPU_DIM_LAYER,
DPU_MIXER_COMBINED_ALPHA,
DPU_MIXER_MAX
};

6
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
View File

@@ -150,10 +150,12 @@ static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer *ctx,
* @dev: Corresponding device for devres management
* @cfg: mixer catalog entry for which driver object is required
* @addr: mapped register io address of MDP
* @mdss_ver: DPU core's major and minor versions
*/
struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev,
const struct dpu_lm_cfg *cfg,
void __iomem *addr)
void __iomem *addr,
const struct dpu_mdss_version *mdss_ver)
{
struct dpu_hw_mixer *c;
@@ -173,7 +175,7 @@ struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev,
c->idx = cfg->id;
c->cap = cfg;
c->ops.setup_mixer_out = dpu_hw_lm_setup_out;
if (test_bit(DPU_MIXER_COMBINED_ALPHA, &c->cap->features))
if (mdss_ver->core_major_ver >= 4)
c->ops.setup_blend_config = dpu_hw_lm_setup_blend_config_combined_alpha;
else
c->ops.setup_blend_config = dpu_hw_lm_setup_blend_config;

3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
View File

@@ -95,6 +95,7 @@ static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev,
const struct dpu_lm_cfg *cfg,
void __iomem *addr);
void __iomem *addr,
const struct dpu_mdss_version *mdss_ver);
#endif /*_DPU_HW_LM_H */

2
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
View File

@@ -60,7 +60,7 @@ int dpu_rm_init(struct drm_device *dev,
struct dpu_hw_mixer *hw;
const struct dpu_lm_cfg *lm = &cat->mixer[i];
hw = dpu_hw_lm_init(dev, lm, mmio);
hw = dpu_hw_lm_init(dev, lm, mmio, cat->mdss_ver);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed lm object creation: err %d\n", rc);