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arm64: dts: renesas: gray-hawk-single: Add second debug serial port

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Describe the second debug serial port (CN9800) on the Gray Hawk Single
board, as provided by HSCIF2, including the SCIF_CLK2 external clock
source, and all related pin control.

Based on a patch for Gray Hawk in the BSP by Nghia Nguyen.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6e1faff6a717cb8344661bafcae5db5dcfb53a90.1709741303.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven
2024-03-12 10:02:36 +01:00
parent 0833ec2fc4
commit 20f4b85a26
1 changed files with 24 additions and 1 deletions
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25
arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
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@@ -18,6 +18,7 @@ / {
aliases {
serial0 = &hscif0;
serial1 = &hscif2;
ethernet0 = &avb0;
};
@@ -90,6 +91,14 @@ &hscif0 {
status = "okay";
};
&hscif2 {
pinctrl-0 = <&hscif2_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
@@ -144,7 +153,7 @@ &mmc0 {
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
pinctrl-names = "default";
avb0_pins: avb0 {
@@ -170,6 +179,11 @@ hscif0_pins: hscif0 {
function = "hscif0";
};
hscif2_pins: hscif2 {
groups = "hscif2_data", "hscif2_ctrl";
function = "hscif2";
};
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
@@ -190,6 +204,11 @@ scif_clk_pins: scif-clk {
groups = "scif_clk";
function = "scif_clk";
};
scif_clk2_pins: scif-clk2 {
groups = "scif_clk2";
function = "scif_clk2";
};
};
&rpc {
@@ -228,3 +247,7 @@ &rwdt {
&scif_clk {
clock-frequency = <24000000>;
};
&scif_clk2 {
clock-frequency = <24000000>;
};