mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-04-30 19:20:26 -04:00
Merge tag 'v5.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Improvements for the rk3288-vyasa board and a lot of cleanups from verifying devicetrees against new yaml bindings. * tag 'v5.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (25 commits) ARM: dts: rockchip: remove #address-cells and #size-cells from i2s nodes ARM: dts: rockchip: swap clocks and clock-names values for i2s nodes ARM: dts: rockchip: remove clock-names property from 'generic-ohci' nodes ARM: dts: rockchip: remove clock-names property from 'generic-ehci' nodes ARM: dts: rockchip: swap clocks and clock-names values for spdif nodes ARM: dts: rockchip: Keep rk3288-tinker SD card IO powered during reboot ARM: dts: rockchip: remove clock-frequency from saradc node rv1108 ARM: dts: rockchip: fix vref-supply for &saradc node rk3288 firefly reload ARM: dts: rockchip: use DMA channels for UARTs for RK3288 ARM: dts: rockchip: rk3xxx: fix L2 cache-controller nodename ARM: dts: rockchip: fix lvds-encoder ports subnode for rk3188-bqedison2qc ARM: dts: add bus to rockchip amba nodenames ARM: dts: rockchip: remove #dma-cells from dma client nodes for rv1108 ARM: dts: rockchip: fix rockchip,default-sample-phase property names ARM: dts: rockchip: fix vqmmc-supply property name for rk3188-bqedison2qc dt-bindings: arm: add Rockchip rk3036-evb board dt-bindings: arm: fix Rockchip Kylin board bindings ARM: dts: rockchip: add missing model properties ARM: dts: rockchip: Add vcc50_hdmi for rk3288-vyasa ARM: dts: rockchip: Fix ddc-i2c-bus for rk3288-vyasa ... Link: https://lore.kernel.org/r/7846023.TtVhTo4ACP@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
@@ -443,7 +443,7 @@ properties:
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- description: Rockchip Kylin
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items:
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- const: rockchip,kylin-rk3036
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- const: rockchip,rk3036-kylin
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- const: rockchip,rk3036
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- description: Rockchip PX3 Evaluation board
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@@ -468,6 +468,11 @@ properties:
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- const: rockchip,r88
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- const: rockchip,rk3368
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- description: Rockchip RK3036 Evaluation board
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items:
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- const: rockchip,rk3036-evb
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- const: rockchip,rk3036
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- description: Rockchip RK3228 Evaluation board
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items:
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- const: rockchip,rk3228-evb
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@@ -319,7 +319,7 @@ &sdio {
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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default-sample-phase = <90>;
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rockchip,default-sample-phase = <90>;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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@@ -54,7 +54,7 @@ cpu1: cpu@f01 {
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};
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};
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amba {
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amba: bus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -101,7 +101,7 @@ xin24m: oscillator {
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#clock-cells = <0>;
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};
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bus_intmem@10080000 {
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bus_intmem: sram@10080000 {
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compatible = "mmio-sram";
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reg = <0x10080000 0x2000>;
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#address-cells = <1>;
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@@ -263,7 +263,7 @@ emmc: mmc@1021c000 {
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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default-sample-phase = <158>;
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rockchip,default-sample-phase = <158>;
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disable-wp;
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dmas = <&pdma 12>;
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dma-names = "rx-tx";
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@@ -281,8 +281,6 @@ i2s: i2s@10220000 {
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compatible = "rockchip,rk3036-i2s", "rockchip,rk3066-i2s";
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reg = <0x10220000 0x4000>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "i2s_clk", "i2s_hclk";
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clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
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dmas = <&pdma 0>, <&pdma 1>;
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@@ -156,14 +156,12 @@ i2s0: i2s@10118000 {
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compatible = "rockchip,rk3066-i2s";
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reg = <0x10118000 0x2000>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_bus>;
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clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&dmac1_s 4>, <&dmac1_s 5>;
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dma-names = "tx", "rx";
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clock-names = "i2s_hclk", "i2s_clk";
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clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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rockchip,playback-channels = <8>;
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rockchip,capture-channels = <2>;
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#sound-dai-cells = <0>;
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@@ -174,14 +172,12 @@ i2s1: i2s@1011a000 {
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compatible = "rockchip,rk3066-i2s";
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reg = <0x1011a000 0x2000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1_bus>;
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clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&dmac1_s 6>, <&dmac1_s 7>;
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dma-names = "tx", "rx";
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clock-names = "i2s_hclk", "i2s_clk";
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clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>;
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rockchip,playback-channels = <2>;
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rockchip,capture-channels = <2>;
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#sound-dai-cells = <0>;
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@@ -192,14 +188,12 @@ i2s2: i2s@1011c000 {
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compatible = "rockchip,rk3066-i2s";
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reg = <0x1011c000 0x2000>;
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s2_bus>;
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clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&dmac1_s 9>, <&dmac1_s 10>;
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dma-names = "tx", "rx";
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clock-names = "i2s_hclk", "i2s_clk";
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clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>;
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rockchip,playback-channels = <2>;
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rockchip,capture-channels = <2>;
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#sound-dai-cells = <0>;
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@@ -58,20 +58,25 @@ gpio-poweroff {
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lvds-encoder {
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compatible = "ti,sn75lvds83", "lvds-encoder";
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds_in_vop0: endpoint {
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remote-endpoint = <&vop0_out_lvds>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds_in_vop0: endpoint {
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remote-endpoint = <&vop0_out_lvds>;
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};
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};
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};
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port@1 {
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reg = <1>;
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lvds_out_panel: endpoint {
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remote-endpoint = <&panel_in_lvds>;
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port@1 {
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reg = <1>;
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lvds_out_panel: endpoint {
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remote-endpoint = <&panel_in_lvds>;
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};
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};
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};
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};
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@@ -465,7 +470,7 @@ &mmc1 {
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>;
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vmmcq-supply = <&vccio_wl>;
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vqmmc-supply = <&vccio_wl>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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@@ -166,14 +166,12 @@ i2s0: i2s@1011a000 {
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compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s";
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reg = <0x1011a000 0x2000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_bus>;
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clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&dmac1_s 6>, <&dmac1_s 7>;
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dma-names = "tx", "rx";
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clock-names = "i2s_hclk", "i2s_clk";
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clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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rockchip,playback-channels = <2>;
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rockchip,capture-channels = <2>;
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#sound-dai-cells = <0>;
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@@ -184,8 +182,8 @@ spdif: sound@1011e000 {
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compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
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reg = <0x1011e000 0x2000>;
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#sound-dai-cells = <0>;
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clock-names = "hclk", "mclk";
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clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
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clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
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clock-names = "mclk", "hclk";
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dmas = <&dmac1_s 8>;
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dma-names = "tx";
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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@@ -95,7 +95,7 @@ opp-1200000000 {
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};
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};
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amba {
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amba: bus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -152,8 +152,6 @@ i2s1: i2s1@100b0000 {
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compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
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reg = <0x100b0000 0x4000>;
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "i2s_clk", "i2s_hclk";
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clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
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dmas = <&pdma 14>, <&pdma 15>;
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@@ -167,8 +165,6 @@ i2s0: i2s0@100c0000 {
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compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
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reg = <0x100c0000 0x4000>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "i2s_clk", "i2s_hclk";
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clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
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dmas = <&pdma 11>, <&pdma 12>;
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@@ -193,8 +189,6 @@ i2s2: i2s2@100e0000 {
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compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
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reg = <0x100e0000 0x4000>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "i2s_clk", "i2s_hclk";
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clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
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dmas = <&pdma 0>, <&pdma 1>;
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@@ -698,7 +692,7 @@ emmc: mmc@30020000 {
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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bus-width = <8>;
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default-sample-phase = <158>;
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rockchip,default-sample-phase = <158>;
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fifo-depth = <0x100>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
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@@ -718,7 +712,6 @@ usb_otg: usb@30040000 {
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g-np-tx-fifo-size = <16>;
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g-rx-fifo-size = <280>;
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g-tx-fifo-size = <256 128 128 64 32 16>;
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g-use-dma;
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phys = <&u2phy0_otg>;
|
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phy-names = "usb2-phy";
|
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status = "disabled";
|
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@@ -729,7 +722,6 @@ usb_host0_ehci: usb@30080000 {
|
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reg = <0x30080000 0x20000>;
|
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
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clocks = <&cru HCLK_HOST0>, <&u2phy0>;
|
||||
clock-names = "usbhost", "utmi";
|
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phys = <&u2phy0_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -740,7 +732,6 @@ usb_host0_ohci: usb@300a0000 {
|
||||
reg = <0x300a0000 0x20000>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST0>, <&u2phy0>;
|
||||
clock-names = "usbhost", "utmi";
|
||||
phys = <&u2phy0_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -751,7 +742,6 @@ usb_host1_ehci: usb@300c0000 {
|
||||
reg = <0x300c0000 0x20000>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST1>, <&u2phy1>;
|
||||
clock-names = "usbhost", "utmi";
|
||||
phys = <&u2phy1_otg>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -762,7 +752,6 @@ usb_host1_ohci: usb@300e0000 {
|
||||
reg = <0x300e0000 0x20000>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST1>, <&u2phy1>;
|
||||
clock-names = "usbhost", "utmi";
|
||||
phys = <&u2phy1_otg>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -775,7 +764,6 @@ usb_host2_ehci: usb@30100000 {
|
||||
clocks = <&cru HCLK_HOST2>, <&u2phy1>;
|
||||
phys = <&u2phy1_host>;
|
||||
phy-names = "usb";
|
||||
clock-names = "usbhost", "utmi";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -784,7 +772,6 @@ usb_host2_ohci: usb@30120000 {
|
||||
reg = <0x30120000 0x20000>;
|
||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST2>, <&u2phy1>;
|
||||
clock-names = "usbhost", "utmi";
|
||||
phys = <&u2phy1_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
|
||||
@@ -4,6 +4,7 @@
|
||||
#include "rk3288-evb.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3288 EVB ACT8846";
|
||||
compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";
|
||||
|
||||
vcc_lcd: vcc-lcd {
|
||||
|
||||
@@ -4,6 +4,7 @@
|
||||
#include "rk3288-evb.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3288 EVB RK808";
|
||||
compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
|
||||
};
|
||||
|
||||
|
||||
@@ -234,6 +234,7 @@ &i2s {
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcc_18>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -9,6 +9,7 @@
|
||||
#include "rk3288.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Netxeon R89";
|
||||
compatible = "netxeon,r89", "rockchip,rk3288";
|
||||
|
||||
memory@0 {
|
||||
|
||||
@@ -276,6 +276,7 @@ regulator-state-mem {
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
@@ -78,6 +78,18 @@ vsus_5v: vsus-5v {
|
||||
vin-supply = <&vcc_io>;
|
||||
};
|
||||
|
||||
vcc50_hdmi: vcc50-hdmi {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc50_hdmi";
|
||||
enable-active-high;
|
||||
gpio = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>; /* HDMI_EN */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc50_hdmi_en>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vsus_5v>;
|
||||
};
|
||||
|
||||
vusb1_5v: vusb1-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vusb1_5v";
|
||||
@@ -150,7 +162,7 @@ &gpu {
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c2>;
|
||||
ddc-i2c-bus = <&i2c5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -286,15 +298,15 @@ regulator-state-mem {
|
||||
};
|
||||
};
|
||||
|
||||
vcc10_lcd: LDO_REG6 {
|
||||
regulator-name = "vcc10_lcd";
|
||||
vdd10_lcd: LDO_REG6 {
|
||||
regulator-name = "vdd10_lcd";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
regulator-suspend-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -347,7 +359,7 @@ regulator-state-mem {
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -446,6 +458,12 @@ phy_rst: phy-rst {
|
||||
};
|
||||
};
|
||||
|
||||
hdmi {
|
||||
vcc50_hdmi_en: vcc50-hdmi-en {
|
||||
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic-int {
|
||||
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
|
||||
@@ -155,7 +155,7 @@ opp-1608000000 {
|
||||
};
|
||||
};
|
||||
|
||||
amba {
|
||||
amba: bus {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
@@ -420,6 +420,8 @@ uart0: serial@ff180000 {
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&dmac_peri 1>, <&dmac_peri 2>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer>;
|
||||
status = "disabled";
|
||||
@@ -433,6 +435,8 @@ uart1: serial@ff190000 {
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&dmac_peri 3>, <&dmac_peri 4>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_xfer>;
|
||||
status = "disabled";
|
||||
@@ -459,6 +463,8 @@ uart3: serial@ff1b0000 {
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&dmac_peri 7>, <&dmac_peri 8>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_xfer>;
|
||||
status = "disabled";
|
||||
@@ -472,6 +478,8 @@ uart4: serial@ff1c0000 {
|
||||
reg-io-width = <4>;
|
||||
clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&dmac_peri 9>, <&dmac_peri 10>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_xfer>;
|
||||
status = "disabled";
|
||||
@@ -601,7 +609,6 @@ usb_host0_ehci: usb@ff500000 {
|
||||
reg = <0x0 0xff500000 0x0 0x100>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_USBHOST0>;
|
||||
clock-names = "usbhost";
|
||||
phys = <&usbphy1>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -644,7 +651,6 @@ usb_hsic: usb@ff5c0000 {
|
||||
reg = <0x0 0xff5c0000 0x0 0x100>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HSIC>;
|
||||
clock-names = "usbhost";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -718,7 +724,7 @@ pwm3: pwm@ff680030 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_intmem@ff700000 {
|
||||
bus_intmem: sram@ff700000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x0 0xff700000 0x0 0x18000>;
|
||||
#address-cells = <1>;
|
||||
@@ -730,7 +736,7 @@ smp-sram@0 {
|
||||
};
|
||||
};
|
||||
|
||||
sram@ff720000 {
|
||||
pmu_sram: sram@ff720000 {
|
||||
compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
|
||||
reg = <0x0 0xff720000 0x0 0x1000>;
|
||||
};
|
||||
@@ -946,8 +952,8 @@ spdif: sound@ff88b0000 {
|
||||
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
|
||||
reg = <0x0 0xff8b0000 0x0 0x10000>;
|
||||
#sound-dai-cells = <0>;
|
||||
clock-names = "hclk", "mclk";
|
||||
clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>;
|
||||
clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>;
|
||||
clock-names = "mclk", "hclk";
|
||||
dmas = <&dmac_bus_s 3>;
|
||||
dma-names = "tx";
|
||||
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -962,12 +968,10 @@ i2s: i2s@ff890000 {
|
||||
reg = <0x0 0xff890000 0x0 0x10000>;
|
||||
#sound-dai-cells = <0>;
|
||||
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
|
||||
clock-names = "i2s_clk", "i2s_hclk";
|
||||
dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>;
|
||||
dma-names = "tx", "rx";
|
||||
clock-names = "i2s_hclk", "i2s_clk";
|
||||
clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0_bus>;
|
||||
rockchip,playback-channels = <8>;
|
||||
|
||||
@@ -32,7 +32,7 @@ aliases {
|
||||
spi1 = &spi1;
|
||||
};
|
||||
|
||||
amba {
|
||||
amba: bus {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@@ -91,7 +91,7 @@ gpu: gpu@10090000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@10138000 {
|
||||
L2: cache-controller@10138000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x10138000 0x1000>;
|
||||
cache-unified;
|
||||
|
||||
@@ -85,7 +85,7 @@ xin24m: oscillator {
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
amba {
|
||||
amba: bus {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@@ -102,7 +102,7 @@ pdma: pdma@102a0000 {
|
||||
};
|
||||
};
|
||||
|
||||
bus_intmem@10080000 {
|
||||
bus_intmem: sram@10080000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x10080000 0x2000>;
|
||||
#address-cells = <1>;
|
||||
@@ -120,7 +120,6 @@ uart2: serial@10210000 {
|
||||
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&pdma 6>, <&pdma 7>;
|
||||
#dma-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m0_xfer>;
|
||||
status = "disabled";
|
||||
@@ -136,7 +135,6 @@ uart1: serial@10220000 {
|
||||
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&pdma 4>, <&pdma 5>;
|
||||
#dma-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_xfer>;
|
||||
status = "disabled";
|
||||
@@ -152,7 +150,6 @@ uart0: serial@10230000 {
|
||||
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
|
||||
clock-names = "baudclk", "apb_pclk";
|
||||
dmas = <&pdma 2>, <&pdma 3>;
|
||||
#dma-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
|
||||
status = "disabled";
|
||||
@@ -208,7 +205,6 @@ spi: spi@10270000 {
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
dmas = <&pdma 8>, <&pdma 9>;
|
||||
dma-names = "tx", "rx";
|
||||
#dma-cells = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@@ -370,7 +366,6 @@ adc: adc@1038c000 {
|
||||
reg = <0x1038c000 0x100>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#io-channel-cells = <1>;
|
||||
clock-frequency = <1000000>;
|
||||
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
||||
clock-names = "saradc", "apb_pclk";
|
||||
status = "disabled";
|
||||
@@ -499,7 +494,6 @@ usb_host_ehci: usb@30140000 {
|
||||
reg = <0x30140000 0x20000>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST0>, <&u2phy>;
|
||||
clock-names = "usbhost", "utmi";
|
||||
phys = <&u2phy_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -510,7 +504,6 @@ usb_host_ohci: usb@30160000 {
|
||||
reg = <0x30160000 0x20000>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST0>, <&u2phy>;
|
||||
clock-names = "usbhost", "utmi";
|
||||
phys = <&u2phy_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@@ -527,7 +520,6 @@ usb_otg: usb@30180000 {
|
||||
g-np-tx-fifo-size = <16>;
|
||||
g-rx-fifo-size = <280>;
|
||||
g-tx-fifo-size = <256 128 128 64 32 16>;
|
||||
g-use-dma;
|
||||
phys = <&u2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "disabled";
|
||||
|
||||
Reference in New Issue
Block a user