Merge the addition of reset constants to the SC7180 display clock
controller through a topic branch, in order to make them available to
the DeviceTree branch as well.
This commit is contained in:
Bjorn Andersson
2026-03-23 22:16:44 -05:00

View File

@@ -6,6 +6,7 @@
#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
/* Clocks */
#define DISP_CC_PLL0 0
#define DISP_CC_PLL0_OUT_EVEN 1
#define DISP_CC_MDSS_AHB_CLK 2
@@ -40,7 +41,11 @@
#define DISP_CC_MDSS_VSYNC_CLK_SRC 31
#define DISP_CC_XO_CLK 32
/* DISP_CC GDSCR */
/* Resets */
#define DISP_CC_MDSS_CORE_BCR 0
#define DISP_CC_MDSS_RSCC_BCR 1
/* GDSCs */
#define MDSS_GDSC 0
#endif