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drm/i915/lobf: Check for sink error and disable LOBF
Disable LOBF/ALPM for any erroneous condition from sink side. v1: Initial version. v2: Add centralized alpm error handling. [Jouni] v3: Improve debug print. [Jouni] v4: Disable alpm permanently for sink error. [Jouni] Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250423092334.2294483-10-animesh.manna@intel.com
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@@ -284,6 +284,9 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
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return;
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}
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if (intel_dp->alpm_parameters.sink_alpm_error)
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return;
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if (!intel_dp_is_edp(intel_dp))
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return;
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@@ -546,5 +549,30 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
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PORT_ALPM_CTL(cpu_transcoder),
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PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
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drm_dbg_kms(display->drm, "Disabling ALPM\n");
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mutex_unlock(&intel_dp->alpm_parameters.lock);
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}
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bool intel_alpm_get_error(struct intel_dp *intel_dp)
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{
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struct intel_display *display = to_intel_display(intel_dp);
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struct drm_dp_aux *aux = &intel_dp->aux;
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u8 val;
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int r;
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r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val);
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if (r != 1) {
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drm_err(display->drm, "Error reading ALPM status\n");
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return true;
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}
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if (val & DP_ALPM_LOCK_TIMEOUT_ERROR) {
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drm_dbg_kms(display->drm, "ALPM lock timeout error\n");
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/* Clearing error */
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drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val);
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return true;
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}
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return false;
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}
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@@ -31,4 +31,5 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
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bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
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bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
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void intel_alpm_disable(struct intel_dp *intel_dp);
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bool intel_alpm_get_error(struct intel_dp *intel_dp);
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#endif
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@@ -1817,6 +1817,7 @@ struct intel_dp {
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u8 silence_period_sym_clocks;
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u8 lfps_half_cycle_num_of_syms;
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bool lobf_disable_debug;
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bool sink_alpm_error;
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} alpm_parameters;
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u8 alpm_dpcd;
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@@ -5392,6 +5392,11 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
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intel_psr_short_pulse(intel_dp);
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if (intel_alpm_get_error(intel_dp)) {
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intel_alpm_disable(intel_dp);
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intel_dp->alpm_parameters.sink_alpm_error = true;
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}
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if (intel_dp_test_short_pulse(intel_dp))
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reprobe_needed = true;
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@@ -3465,29 +3465,15 @@ static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
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static void psr_alpm_check(struct intel_dp *intel_dp)
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{
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struct intel_display *display = to_intel_display(intel_dp);
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struct drm_dp_aux *aux = &intel_dp->aux;
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struct intel_psr *psr = &intel_dp->psr;
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u8 val;
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int r;
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if (!psr->sel_update_enabled)
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return;
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r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val);
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if (r != 1) {
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drm_err(display->drm, "Error reading ALPM status\n");
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return;
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}
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if (val & DP_ALPM_LOCK_TIMEOUT_ERROR) {
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if (intel_alpm_get_error(intel_dp)) {
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intel_psr_disable_locked(intel_dp);
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psr->sink_not_reliable = true;
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drm_dbg_kms(display->drm,
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"ALPM lock timeout error, disabling PSR\n");
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/* Clearing error */
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drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val);
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intel_alpm_disable(intel_dp);
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}
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}
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