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drm/amd/display: Set WM set A to 0 if full pstate not supported
[Why] If full pstate is not supported, we should set WM set A to 0 to prevent any hangs [How] If pstate is not supported, set watermark set A to 0 Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -2313,7 +2313,7 @@ void dcn30_calculate_wm_and_dlg(
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* calculate DLG based on dummy p-state latency, and max out the set A p-state watermark
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*/
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context->bw_ctx.bw.dcn.watermarks.a = context->bw_ctx.bw.dcn.watermarks.c;
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context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = 0x13FFFF;
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context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = 0;
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} else {
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/* Set A:
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* DCFCLK: Min Required
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