mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-03 19:26:01 -04:00
Code Issues Packages Projects Releases Wiki Activity

drm/amd/display: Use fixed DET Buffer Size

Browse Source 
[why]
Regression from DML1.0 where we use differen DET buffer sizes for each
pipe. From the spec, we need to use DET buffer size of 384 kb for each
pipe

[how]
Ensure to use 384 kb DET buffer sizes for each available pipe.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sung Joon Kim
2023-08-09 16:39:53 -04:00
committed by Alex Deucher
parent e47d7ca757
commit 1d93c4db4e
3 changed files with 16 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
View File

@@ -2078,7 +2078,8 @@ static bool dcn35_resource_construct(
dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params;
dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
dc->dml2_options.max_segments_per_hubp = 18;
dc->dml2_options.max_segments_per_hubp = 24;
dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/
if (dc->config.sdpif_request_limit_words_per_umc == 0)

22
drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
View File

@@ -414,17 +414,21 @@ void dml2_apply_det_buffer_allocation_policy(struct dml2_context *in_ctx, struct
for (plane_index = 0; plane_index < dml_dispcfg->num_surfaces; plane_index++) {
dml_dispcfg->plane.DETSizeOverride[plane_index] = ((max_det_size / num_of_streams) / num_of_planes_per_stream[stream_index] / in_ctx->det_helper_scratch.dpps_per_surface[plane_index]);
if (in_ctx->config.override_det_buffer_size_kbytes)
dml_dispcfg->plane.DETSizeOverride[plane_index] = max_det_size / in_ctx->config.dcn_pipe_count;
else {
dml_dispcfg->plane.DETSizeOverride[plane_index] = ((max_det_size / num_of_streams) / num_of_planes_per_stream[stream_index] / in_ctx->det_helper_scratch.dpps_per_surface[plane_index]);
/* If the override size is not divisible by det_segment_size then round off to nearest number divisible by det_segment_size as
* this is a requirement.
*/
if (dml_dispcfg->plane.DETSizeOverride[plane_index] % in_ctx->config.det_segment_size != 0) {
dml_dispcfg->plane.DETSizeOverride[plane_index] = dml_dispcfg->plane.DETSizeOverride[plane_index] & ~0x3F;
/* If the override size is not divisible by det_segment_size then round off to nearest number divisible by det_segment_size as
* this is a requirement.
*/
if (dml_dispcfg->plane.DETSizeOverride[plane_index] % in_ctx->config.det_segment_size != 0) {
dml_dispcfg->plane.DETSizeOverride[plane_index] = dml_dispcfg->plane.DETSizeOverride[plane_index] & ~0x3F;
}
if (plane_index + 1 < dml_dispcfg->num_surfaces && dml_dispcfg->plane.BlendingAndTiming[plane_index] != dml_dispcfg->plane.BlendingAndTiming[plane_index + 1])
stream_index++;
}
if (plane_index + 1 < dml_dispcfg->num_surfaces && dml_dispcfg->plane.BlendingAndTiming[plane_index] != dml_dispcfg->plane.BlendingAndTiming[plane_index + 1])
stream_index++;
}
}

1
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
View File

@@ -137,6 +137,7 @@ struct dml2_configuration_options {
bool skip_hw_state_mapping;
bool optimize_odm_4to1;
bool minimize_dispclk_using_odm;
bool override_det_buffer_size_kbytes;
struct dml2_dc_callbacks callbacks;
struct {
bool force_disable_subvp;