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riscv: dts: sophgo: sg2042: add pinctrl support

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Add pinctrl node and related pin configuration for SG2042 SoC.

Link: https://lore.kernel.org/r/20250211051801.470800-9-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
This commit is contained in:
Inochi Amaoto
2025-02-11 13:17:56 +08:00
parent a5806cd506
commit 1cb666ec5a
2 changed files with 78 additions and 0 deletions
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72
arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
View File

@@ -42,6 +42,8 @@ &cgi_dpll1 {
};
&emmc {
pinctrl-0 = <&emmc_cfg>;
pinctrl-names = "default";
bus-width = <4>;
no-sdio;
no-sd;
@@ -51,6 +53,8 @@ &emmc {
};
&i2c1 {
pinctrl-0 = <&i2c1_cfg>;
pinctrl-names = "default";
status = "okay";
mcu: syscon@17 {
@@ -60,7 +64,73 @@ mcu: syscon@17 {
};
};
&pinctrl {
emmc_cfg: sdhci-emmc-cfg {
sdhci-emmc-wp-pins {
pinmux = <PINMUX(PIN_EMMC_WP, 0)>;
bias-disable;
drive-strength-microamp = <26800>;
input-schmitt-disable;
};
sdhci-emmc-cd-pins {
pinmux = <PINMUX(PIN_EMMC_CD, 0)>;
bias-pull-up;
drive-strength-microamp = <26800>;
input-schmitt-enable;
};
sdhci-emmc-rst-pwr-pins {
pinmux = <PINMUX(PIN_EMMC_RST, 0)>,
<PINMUX(PIN_EMMC_PWR_EN, 0)>;
bias-disable;
drive-strength-microamp = <26800>;
input-schmitt-disable;
};
};
i2c1_cfg: i2c1-cfg {
i2c1-pins {
pinmux = <PINMUX(PIN_IIC1_SDA, 0)>,
<PINMUX(PIN_IIC1_SCL, 0)>;
bias-pull-up;
drive-strength-microamp = <26800>;
input-schmitt-enable;
};
};
sd_cfg: sdhci-sd-cfg {
sdhci-sd-cd-wp-pins {
pinmux = <PINMUX(PIN_SDIO_CD, 0)>,
<PINMUX(PIN_SDIO_WP, 0)>;
bias-pull-up;
drive-strength-microamp = <26800>;
input-schmitt-enable;
};
sdhci-sd-rst-pwr-pins {
pinmux = <PINMUX(PIN_SDIO_RST, 0)>,
<PINMUX(PIN_SDIO_PWR_EN, 0)>;
bias-disable;
drive-strength-microamp = <26800>;
input-schmitt-disable;
};
};
uart0_cfg: uart0-cfg {
uart0-rx-pins {
pinmux = <PINMUX(PIN_UART0_TX, 0)>,
<PINMUX(PIN_UART0_RX, 0)>;
bias-pull-up;
drive-strength-microamp = <26800>;
input-schmitt-enable;
};
};
};
&sd {
pinctrl-0 = <&sd_cfg>;
pinctrl-names = "default";
bus-width = <4>;
no-sdio;
no-mmc;
@@ -69,6 +139,8 @@ &sd {
};
&uart0 {
pinctrl-0 = <&uart0_cfg>;
pinctrl-names = "default";
status = "okay";
};

6
arch/riscv/boot/dts/sophgo/sg2042.dtsi
View File

@@ -8,6 +8,7 @@
#include <dt-bindings/clock/sophgo,sg2042-pll.h>
#include <dt-bindings/clock/sophgo,sg2042-rpgate.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/pinctrl-sg2042.h>
#include <dt-bindings/reset/sophgo,sg2042-reset.h>
#include "sg2042-cpus.dtsi"
@@ -200,6 +201,11 @@ rpgate: clock-controller@7030010368 {
#clock-cells = <1>;
};
pinctrl: pinctrl@7030011000 {
compatible = "sophgo,sg2042-pinctrl";
reg = <0x70 0x30011000 0x0 0x1000>;
};
clkgen: clock-controller@7030012000 {
compatible = "sophgo,sg2042-clkgen";
reg = <0x70 0x30012000 0x0 0x1000>;