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drm/amd/display: Update V_UPDATE whenever VSTARTUP changes

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[Why]
If VSTARTUP changes due to bandwidth requirements, we must
recalculate and update VLINE2 as well for proper flip reporting.

[How]
After all calls to program_global_sync which reconfigures
VSTARTUP, also make sure to update V_UPDATE (i.e. VLINE2 on DCNx).

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Aric Cyr
2019-09-06 16:24:54 -04:00
committed by Alex Deucher
parent cbc697b2e3
commit 1caba4e83b
2 changed files with 10 additions and 1 deletions
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4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@@ -2511,8 +2511,10 @@ static void program_all_pipe_in_tree(
pipe_ctx->stream_res.tg->funcs->set_vtg_params(
pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);
dc->hwss.blank_pixel_data(dc, pipe_ctx, blank);
if (dc->hwss.setup_vupdate_interrupt)
dc->hwss.setup_vupdate_interrupt(pipe_ctx);
dc->hwss.blank_pixel_data(dc, pipe_ctx, blank);
}
if (pipe_ctx->plane_state != NULL)

7
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
View File

@@ -1370,6 +1370,9 @@ static void dcn20_program_pipe(
pipe_ctx->stream_res.tg->funcs->set_vtg_params(
pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);
if (dc->hwss.setup_vupdate_interrupt)
dc->hwss.setup_vupdate_interrupt(pipe_ctx);
}
if (pipe_ctx->update_flags.bits.odm)
@@ -1581,8 +1584,12 @@ bool dcn20_update_bandwidth(
pipe_ctx->stream_res.tg->funcs->set_vtg_params(
pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing);
if (pipe_ctx->prev_odm_pipe == NULL)
dc->hwss.blank_pixel_data(dc, pipe_ctx, blank);
if (dc->hwss.setup_vupdate_interrupt)
dc->hwss.setup_vupdate_interrupt(pipe_ctx);
}
pipe_ctx->plane_res.hubp->funcs->hubp_setup(