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arm64: dts: ti: k3-am65: Enable SPI nodes at the board level

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SPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the SPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20221028142417.10642-4-afd@ti.com
This commit is contained in:
Andrew Davis
2022-10-28 09:24:09 -05:00
committed by Nishanth Menon
parent c0a5ba87af
commit 1c49cbb19b
4 changed files with 10 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
View File

@@ -574,6 +574,7 @@ &usb1 {
};
&mcu_spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_spi0_pins_default>;

5
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
View File

@@ -217,6 +217,7 @@ main_spi0: spi@2100000 {
#size-cells = <0>;
dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
dma-names = "tx0", "rx0";
status = "disabled";
};
main_spi1: spi@2110000 {
@@ -229,6 +230,7 @@ main_spi1: spi@2110000 {
#size-cells = <0>;
assigned-clocks = <&k3_clks 137 1>;
assigned-clock-rates = <48000000>;
status = "disabled";
};
main_spi2: spi@2120000 {
@@ -239,6 +241,7 @@ main_spi2: spi@2120000 {
power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
main_spi3: spi@2130000 {
@@ -249,6 +252,7 @@ main_spi3: spi@2130000 {
power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
main_spi4: spi@2140000 {
@@ -259,6 +263,7 @@ main_spi4: spi@2140000 {
power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
sdhci0: mmc@4f80000 {

3
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
View File

@@ -58,6 +58,7 @@ mcu_spi0: spi@40300000 {
power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mcu_spi1: spi@40310000 {
@@ -68,6 +69,7 @@ mcu_spi1: spi@40310000 {
power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mcu_spi2: spi@40320000 {
@@ -78,6 +80,7 @@ mcu_spi2: spi@40320000 {
power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
tscadc0: tscadc@40200000 {

1
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
View File

@@ -342,6 +342,7 @@ &ecap0 {
};
&main_spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
#address-cells = <1>;