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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-08 16:22:41 -04:00
wifi: rtw89: update DMA function with different generation
The register of control and polling function for TX/RX DMA is different from different generation, so update them. Also rename polling_dma function to polling_dma_idle to avoid misunderstanding. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240302005828.13666-4-pkshih@realtek.com
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@@ -3202,7 +3202,7 @@ struct rtw89_hci_ops {
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void (*ctrl_txdma_ch)(struct rtw89_dev *rtwdev, bool enable);
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void (*ctrl_txdma_fw_ch)(struct rtw89_dev *rtwdev, bool enable);
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void (*ctrl_trxhci)(struct rtw89_dev *rtwdev, bool enable);
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int (*poll_txdma_ch)(struct rtw89_dev *rtwdev);
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int (*poll_txdma_ch_idle)(struct rtw89_dev *rtwdev);
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void (*clr_idx_all)(struct rtw89_dev *rtwdev);
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void (*clear)(struct rtw89_dev *rtwdev, struct pci_dev *pdev);
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void (*disable_intr)(struct rtw89_dev *rtwdev);
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@@ -5253,12 +5253,12 @@ static inline void rtw89_hci_ctrl_trxhci(struct rtw89_dev *rtwdev, bool enable)
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rtwdev->hci.ops->ctrl_trxhci(rtwdev, enable);
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}
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static inline int rtw89_hci_poll_txdma_ch(struct rtw89_dev *rtwdev)
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static inline int rtw89_hci_poll_txdma_ch_idle(struct rtw89_dev *rtwdev)
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{
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int ret = 0;
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if (rtwdev->hci.ops->poll_txdma_ch)
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ret = rtwdev->hci.ops->poll_txdma_ch(rtwdev);
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if (rtwdev->hci.ops->poll_txdma_ch_idle)
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ret = rtwdev->hci.ops->poll_txdma_ch_idle(rtwdev);
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return ret;
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}
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@@ -218,7 +218,7 @@ int rtw89_pci_sync_skb_for_device_and_validate_rx_info(struct rtw89_dev *rtwdev,
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return ret;
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}
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static void rtw89_pci_ctrl_txdma_ch_pcie(struct rtw89_dev *rtwdev, bool enable)
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static void rtw89_pci_ctrl_txdma_ch_ax(struct rtw89_dev *rtwdev, bool enable)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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const struct rtw89_reg_def *dma_stop1 = &info->dma_stop1;
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@@ -235,7 +235,7 @@ static void rtw89_pci_ctrl_txdma_ch_pcie(struct rtw89_dev *rtwdev, bool enable)
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}
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}
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static void rtw89_pci_ctrl_txdma_fw_ch_pcie(struct rtw89_dev *rtwdev, bool enable)
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static void rtw89_pci_ctrl_txdma_fw_ch_ax(struct rtw89_dev *rtwdev, bool enable)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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const struct rtw89_reg_def *dma_stop1 = &info->dma_stop1;
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@@ -2524,7 +2524,7 @@ static void rtw89_pci_clr_idx_all_ax(struct rtw89_dev *rtwdev)
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B_AX_CLR_RXQ_IDX | B_AX_CLR_RPQ_IDX);
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}
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static int rtw89_poll_txdma_ch_idle_pcie(struct rtw89_dev *rtwdev)
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static int rtw89_pci_poll_txdma_ch_idle_ax(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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u32 ret, check, dma_busy;
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@@ -2551,7 +2551,7 @@ static int rtw89_poll_txdma_ch_idle_pcie(struct rtw89_dev *rtwdev)
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return 0;
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}
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static int rtw89_poll_rxdma_ch_idle_pcie(struct rtw89_dev *rtwdev)
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static int rtw89_pci_poll_rxdma_ch_idle_ax(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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u32 ret, check, dma_busy;
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@@ -2571,13 +2571,13 @@ static int rtw89_pci_poll_dma_all_idle(struct rtw89_dev *rtwdev)
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{
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u32 ret;
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ret = rtw89_poll_txdma_ch_idle_pcie(rtwdev);
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ret = rtw89_pci_poll_txdma_ch_idle_ax(rtwdev);
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if (ret) {
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rtw89_err(rtwdev, "txdma ch busy\n");
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return ret;
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}
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ret = rtw89_poll_rxdma_ch_idle_pcie(rtwdev);
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ret = rtw89_pci_poll_rxdma_ch_idle_ax(rtwdev);
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if (ret) {
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rtw89_err(rtwdev, "rxdma ch busy\n");
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return ret;
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@@ -2756,8 +2756,8 @@ static int rtw89_pci_ops_mac_pre_init_ax(struct rtw89_dev *rtwdev)
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}
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/* disable all channels except to FW CMD channel to download firmware */
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rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, false);
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rtw89_pci_ctrl_txdma_fw_ch_pcie(rtwdev, true);
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rtw89_pci_ctrl_txdma_ch_ax(rtwdev, false);
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rtw89_pci_ctrl_txdma_fw_ch_ax(rtwdev, true);
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/* start DMA activities */
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rtw89_pci_ctrl_dma_all(rtwdev, true);
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@@ -2870,7 +2870,7 @@ static int rtw89_pci_ops_mac_post_init_ax(struct rtw89_dev *rtwdev)
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}
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/* enable DMA for all queues */
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rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, true);
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rtw89_pci_ctrl_txdma_ch_ax(rtwdev, true);
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/* Release PCI IO */
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rtw89_write32_clr(rtwdev, info->dma_stop1.addr,
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@@ -4093,6 +4093,10 @@ const struct rtw89_pci_gen_def rtw89_pci_gen_ax = {
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.lv1rst_stop_dma = rtw89_pci_lv1rst_stop_dma_ax,
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.lv1rst_start_dma = rtw89_pci_lv1rst_start_dma_ax,
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.ctrl_txdma_ch = rtw89_pci_ctrl_txdma_ch_ax,
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.ctrl_txdma_fw_ch = rtw89_pci_ctrl_txdma_fw_ch_ax,
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.poll_txdma_ch_idle = rtw89_pci_poll_txdma_ch_idle_ax,
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.aspm_set = rtw89_pci_aspm_set_ax,
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.clkreq_set = rtw89_pci_clkreq_set_ax,
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.l1ss_set = rtw89_pci_l1ss_set_ax,
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@@ -4130,10 +4134,11 @@ static const struct rtw89_hci_ops rtw89_pci_ops = {
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.recovery_start = rtw89_pci_ops_recovery_start,
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.recovery_complete = rtw89_pci_ops_recovery_complete,
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.ctrl_txdma_ch = rtw89_pci_ctrl_txdma_ch_pcie,
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.ctrl_txdma_fw_ch = rtw89_pci_ctrl_txdma_fw_ch_pcie,
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.ctrl_txdma_ch = rtw89_pci_ctrl_txdma_ch,
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.ctrl_txdma_fw_ch = rtw89_pci_ctrl_txdma_fw_ch,
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.ctrl_trxhci = rtw89_pci_ctrl_dma_trx,
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.poll_txdma_ch = rtw89_poll_txdma_ch_idle_pcie,
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.poll_txdma_ch_idle = rtw89_pci_poll_txdma_ch_idle,
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.clr_idx_all = rtw89_pci_clr_idx_all,
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.clear = rtw89_pci_clear_resource,
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.disable_intr = rtw89_pci_disable_intr_lock,
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@@ -1243,6 +1243,10 @@ struct rtw89_pci_gen_def {
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int (*lv1rst_stop_dma)(struct rtw89_dev *rtwdev);
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int (*lv1rst_start_dma)(struct rtw89_dev *rtwdev);
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void (*ctrl_txdma_ch)(struct rtw89_dev *rtwdev, bool enable);
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void (*ctrl_txdma_fw_ch)(struct rtw89_dev *rtwdev, bool enable);
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int (*poll_txdma_ch_idle)(struct rtw89_dev *rtwdev);
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void (*aspm_set)(struct rtw89_dev *rtwdev, bool enable);
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void (*clkreq_set)(struct rtw89_dev *rtwdev, bool enable);
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void (*l1ss_set)(struct rtw89_dev *rtwdev, bool enable);
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@@ -1709,4 +1713,27 @@ static inline int rtw89_pci_reset_bdram(struct rtw89_dev *rtwdev)
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return gen_def->rst_bdram(rtwdev);
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}
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static inline void rtw89_pci_ctrl_txdma_ch(struct rtw89_dev *rtwdev, bool enable)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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const struct rtw89_pci_gen_def *gen_def = info->gen_def;
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return gen_def->ctrl_txdma_ch(rtwdev, enable);
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}
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static inline void rtw89_pci_ctrl_txdma_fw_ch(struct rtw89_dev *rtwdev, bool enable)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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const struct rtw89_pci_gen_def *gen_def = info->gen_def;
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return gen_def->ctrl_txdma_fw_ch(rtwdev, enable);
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}
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static inline int rtw89_pci_poll_txdma_ch_idle(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_pci_info *info = rtwdev->pci_info;
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const struct rtw89_pci_gen_def *gen_def = info->gen_def;
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return gen_def->poll_txdma_ch_idle(rtwdev);
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}
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#endif
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@@ -317,8 +317,7 @@ static void rtw89_pci_ser_setting_be(struct rtw89_dev *rtwdev)
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rtw89_write32(rtwdev, R_BE_REG_PL1_MASK, val32);
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}
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static void rtw89_pci_ctrl_txdma_ch_be(struct rtw89_dev *rtwdev, bool all_en,
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bool h2c_en)
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static void rtw89_pci_ctrl_txdma_ch_be(struct rtw89_dev *rtwdev, bool enable)
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{
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u32 mask_all;
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u32 val;
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@@ -331,12 +330,19 @@ static void rtw89_pci_ctrl_txdma_ch_be(struct rtw89_dev *rtwdev, bool all_en,
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val = rtw89_read32(rtwdev, R_BE_HAXI_DMA_STOP1);
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val |= B_BE_STOP_CH13 | B_BE_STOP_CH14;
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if (all_en)
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if (enable)
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val &= ~mask_all;
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else
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val |= mask_all;
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if (h2c_en)
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rtw89_write32(rtwdev, R_BE_HAXI_DMA_STOP1, val);
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}
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static void rtw89_pci_ctrl_txdma_fw_ch_be(struct rtw89_dev *rtwdev, bool enable)
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{
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u32 val = rtw89_read32(rtwdev, R_BE_HAXI_DMA_STOP1);
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if (enable)
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val &= ~B_BE_STOP_CH12;
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else
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val |= B_BE_STOP_CH12;
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@@ -375,7 +381,8 @@ static int rtw89_pci_ops_mac_pre_init_be(struct rtw89_dev *rtwdev)
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rtw89_pci_pcie_setting_be(rtwdev);
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rtw89_pci_ser_setting_be(rtwdev);
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rtw89_pci_ctrl_txdma_ch_be(rtwdev, false, true);
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rtw89_pci_ctrl_txdma_ch_be(rtwdev, false);
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rtw89_pci_ctrl_txdma_fw_ch_be(rtwdev, true);
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rtw89_pci_ctrl_trxdma_pcie_be(rtwdev, MAC_AX_PCIE_ENABLE,
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MAC_AX_PCIE_ENABLE, MAC_AX_PCIE_ENABLE);
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@@ -485,7 +492,8 @@ static int rtw89_pci_ops_mac_post_init_be(struct rtw89_dev *rtwdev)
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rtw89_pci_ctrl_trxdma_pcie_be(rtwdev, MAC_AX_PCIE_IGNORE,
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MAC_AX_PCIE_IGNORE, MAC_AX_PCIE_ENABLE);
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rtw89_pci_ctrl_wpdma_pcie_be(rtwdev, true);
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rtw89_pci_ctrl_txdma_ch_be(rtwdev, true, true);
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rtw89_pci_ctrl_txdma_ch_be(rtwdev, true);
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rtw89_pci_ctrl_txdma_fw_ch_be(rtwdev, true);
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rtw89_pci_configure_mit_be(rtwdev);
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return 0;
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@@ -559,6 +567,10 @@ const struct rtw89_pci_gen_def rtw89_pci_gen_be = {
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.lv1rst_stop_dma = rtw89_pci_lv1rst_stop_dma_be,
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.lv1rst_start_dma = rtw89_pci_lv1rst_start_dma_be,
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.ctrl_txdma_ch = rtw89_pci_ctrl_txdma_ch_be,
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.ctrl_txdma_fw_ch = rtw89_pci_ctrl_txdma_fw_ch_be,
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.poll_txdma_ch_idle = rtw89_pci_poll_txdma_ch_idle_be,
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.aspm_set = rtw89_pci_aspm_set_be,
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.clkreq_set = rtw89_pci_clkreq_set_be,
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.l1ss_set = rtw89_pci_l1ss_set_be,
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@@ -560,7 +560,7 @@ static int rtw89_wow_enable_trx_pre(struct rtw89_dev *rtwdev)
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rtw89_mac_ptk_drop_by_band_and_wait(rtwdev, RTW89_MAC_0);
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ret = rtw89_hci_poll_txdma_ch(rtwdev);
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ret = rtw89_hci_poll_txdma_ch_idle(rtwdev);
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if (ret) {
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rtw89_err(rtwdev, "txdma ch busy\n");
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return ret;
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@@ -583,7 +583,7 @@ static int rtw89_wow_enable_trx_post(struct rtw89_dev *rtwdev)
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rtw89_hci_disable_intr(rtwdev);
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rtw89_hci_ctrl_trxhci(rtwdev, false);
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ret = rtw89_hci_poll_txdma_ch(rtwdev);
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ret = rtw89_hci_poll_txdma_ch_idle(rtwdev);
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if (ret) {
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rtw89_err(rtwdev, "failed to poll txdma ch idle pcie\n");
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return ret;
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