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iwlwifi: BZ Family SW reset support
Previously added BZ reset wasn't taking into account the call to iwl_trans_pcie_sw_reset which used a pre-BZ logic to reset the device - enabling iwl_trans_pcie_sw_reset to support BZ family made this reset redundant. MAC_ACCESS clear shouldn't be called here but only when calling _iwl_trans_pcie_stop_device which now support also BZ family. Signed-off-by: Roee Goldfiner <roee.h.goldfiner@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20211017162352.648931fe07e2.Ibf30f9b8e70536da93c4a574ace33d325d3f8da4@changeid Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
committed by
Luca Coelho
parent
44b2dd4098
commit
1b6598c3dc
@@ -163,18 +163,6 @@ void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
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else
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iwl_pcie_ctxt_info_free(trans);
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/* Make sure (redundant) we've released our request to stay awake */
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if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
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iwl_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
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else
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iwl_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_SW_RESET);
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}
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/* Stop the device, and put it in low power state */
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iwl_pcie_gen2_apm_stop(trans, false);
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@@ -129,7 +129,12 @@ void iwl_trans_pcie_dump_regs(struct iwl_trans *trans)
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static void iwl_trans_pcie_sw_reset(struct iwl_trans *trans)
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{
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/* Reset entire device - do controller reset (results in SHRD_HW_RST) */
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iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
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if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_SW_RESET);
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else
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iwl_set_bit(trans, CSR_RESET,
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CSR_RESET_REG_FLAG_SW_RESET);
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usleep_range(5000, 6000);
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}
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@@ -1209,8 +1214,12 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans)
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}
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/* Make sure (redundant) we've released our request to stay awake */
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iwl_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
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iwl_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
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else
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iwl_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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/* Stop the device, and put it in low power state */
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iwl_pcie_apm_stop(trans, false);
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@@ -2141,9 +2150,12 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
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if (trans_pcie->cmd_hold_nic_awake)
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goto out;
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__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
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__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
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else
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__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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/*
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* Above we read the CSR_GP_CNTRL register, which will flush
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* any previous writes, but we need the write that clears the
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