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arm64: dts: rockchip: Add dfi and dmc nodes to rk3399
These are required to support DDR DVFS on RK3399 platforms. Change since Daniel's posting: reordered by unit address, per existing style Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Gaël PORTAY <gael.portay@collabora.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Brian Norris <briannorris@chromium.org> Link: https://lore.kernel.org/r/20220308110825.v4.11.Ie97993621975c5463d7928a8646f3737c9f2921d@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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committed by
Heiko Stuebner
parent
14fc86b9aa
commit
1b3f36854a
@@ -178,6 +178,15 @@ display-subsystem {
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ports = <&vopl_out>, <&vopb_out>;
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};
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dmc: memory-controller {
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compatible = "rockchip,rk3399-dmc";
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rockchip,pmu = <&pmugrf>;
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devfreq-events = <&dfi>;
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clocks = <&cru SCLK_DDRC>;
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clock-names = "dmc_clk";
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status = "disabled";
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};
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pmu_a53 {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
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@@ -1295,6 +1304,16 @@ pwm3: pwm@ff420030 {
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status = "disabled";
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};
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dfi: dfi@ff630000 {
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reg = <0x00 0xff630000 0x00 0x4000>;
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compatible = "rockchip,rk3399-dfi";
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rockchip,pmu = <&pmugrf>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru PCLK_DDR_MON>;
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clock-names = "pclk_ddr_mon";
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status = "disabled";
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};
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vpu: video-codec@ff650000 {
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compatible = "rockchip,rk3399-vpu";
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reg = <0x0 0xff650000 0x0 0x800>;
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