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drm/xe/guc: refactor ads to use guc_class

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Currently in the lrc init flow on the ads side, we loop through each
generic engine class and convert that to the respective guc engine
class. However, with some upcoming changes, it will be better to go the
opposite way and loop through every guc engine class, and convert that
to the generic engine class.

This will be needed in an upcoming patch where we have a new guc engine
class that just matches up to the existing blitter/copy class, but needs
to be treated as a separate entity from the normal copy lrc, when
setting up the ADS.

This also reworks engine_enable_mask to operate on the guc_class, that
way we can easily filter out the PAGING vs normal BSC, when applicable.

As a bonus, this also gets rid of two xe_engine_class_to_guc_class()
users which will be helpful for the next patch.

No functional changes.

v2 (Daniele):
 - Simplify fill_engine_enable_masks() to just loop over all guc
   classes.

Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patch.msgid.link/20260626111520.487997-13-matthew.auld@intel.com
This commit is contained in:
Matthew Auld
2026-06-26 12:15:22 +01:00
parent 9cdcdadab5
commit 1ac2dbb6f7
1 changed files with 41 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

69
drivers/gpu/drm/xe/xe_guc_ads.c
View File

@@ -251,14 +251,35 @@ static size_t calculate_regset_size(struct xe_gt *gt)
return count * sizeof(struct guc_mmio_reg);
}
static u32 engine_enable_mask(struct xe_gt *gt, enum xe_engine_class class)
static inline enum xe_engine_class guc_class_to_engine_class(u16 guc_class)
{
switch (guc_class) {
case GUC_RENDER_CLASS:
return XE_ENGINE_CLASS_RENDER;
case GUC_VIDEO_CLASS:
return XE_ENGINE_CLASS_VIDEO_DECODE;
case GUC_VIDEOENHANCE_CLASS:
return XE_ENGINE_CLASS_VIDEO_ENHANCE;
case GUC_BLITTER_CLASS:
return XE_ENGINE_CLASS_COPY;
case GUC_COMPUTE_CLASS:
return XE_ENGINE_CLASS_COMPUTE;
case GUC_GSC_OTHER_CLASS:
return XE_ENGINE_CLASS_OTHER;
default:
XE_WARN_ON(guc_class);
return -1;
}
}
static u32 engine_enable_mask(struct xe_gt *gt, u16 guc_class)
{
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
u32 mask = 0;
for_each_hw_engine(hwe, gt, id)
if (hwe->class == class)
if (xe_engine_class_to_guc_class(hwe->class) == guc_class)
mask |= BIT(hwe->instance);
return mask;
@@ -268,10 +289,13 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
{
struct xe_gt *gt = ads_to_gt(ads);
size_t total_size = 0, alloc_size, real_size;
int class;
u16 guc_class;
for (class = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
if (!engine_enable_mask(gt, class))
for (guc_class = 0; guc_class <= GUC_LAST_ENGINE_CLASS; ++guc_class) {
enum xe_engine_class class =
guc_class_to_engine_class(guc_class);
if (!engine_enable_mask(gt, guc_class))
continue;
real_size = xe_gt_lrc_size(gt, class);
@@ -472,20 +496,11 @@ static void fill_engine_enable_masks(struct xe_gt *gt,
struct iosys_map *info_map)
{
struct xe_device *xe = gt_to_xe(gt);
u16 guc_class;
info_map_write(xe, info_map, engine_enabled_masks[GUC_RENDER_CLASS],
engine_enable_mask(gt, XE_ENGINE_CLASS_RENDER));
info_map_write(xe, info_map, engine_enabled_masks[GUC_BLITTER_CLASS],
engine_enable_mask(gt, XE_ENGINE_CLASS_COPY));
info_map_write(xe, info_map, engine_enabled_masks[GUC_VIDEO_CLASS],
engine_enable_mask(gt, XE_ENGINE_CLASS_VIDEO_DECODE));
info_map_write(xe, info_map,
engine_enabled_masks[GUC_VIDEOENHANCE_CLASS],
engine_enable_mask(gt, XE_ENGINE_CLASS_VIDEO_ENHANCE));
info_map_write(xe, info_map, engine_enabled_masks[GUC_COMPUTE_CLASS],
engine_enable_mask(gt, XE_ENGINE_CLASS_COMPUTE));
info_map_write(xe, info_map, engine_enabled_masks[GUC_GSC_OTHER_CLASS],
engine_enable_mask(gt, XE_ENGINE_CLASS_OTHER));
for (guc_class = 0; guc_class <= GUC_LAST_ENGINE_CLASS; ++guc_class)
info_map_write(xe, info_map, engine_enabled_masks[guc_class],
engine_enable_mask(gt, guc_class));
}
/*
@@ -500,15 +515,14 @@ static void guc_golden_lrc_init(struct xe_guc_ads *ads)
offsetof(struct __guc_ads_blob, system_info));
size_t alloc_size, real_size;
u32 addr_ggtt, offset;
int class;
u16 guc_class;
offset = guc_ads_golden_lrc_offset(ads);
addr_ggtt = xe_bo_ggtt_addr(ads->bo) + offset;
for (class = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
u8 guc_class;
guc_class = xe_engine_class_to_guc_class(class);
for (guc_class = 0; guc_class <= GUC_LAST_ENGINE_CLASS; ++guc_class) {
enum xe_engine_class class =
guc_class_to_engine_class(guc_class);
if (!info_map_read(xe, &info_map,
engine_enabled_masks[guc_class]))
@@ -957,14 +971,13 @@ static void guc_golden_lrc_populate(struct xe_guc_ads *ads)
offsetof(struct __guc_ads_blob, system_info));
size_t total_size = 0, alloc_size, real_size;
u32 offset;
int class;
u16 guc_class;
offset = guc_ads_golden_lrc_offset(ads);
for (class = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
u8 guc_class;
guc_class = xe_engine_class_to_guc_class(class);
for (guc_class = 0; guc_class <= GUC_LAST_ENGINE_CLASS; ++guc_class) {
enum xe_engine_class class =
guc_class_to_engine_class(guc_class);
if (!info_map_read(xe, &info_map,
engine_enabled_masks[guc_class]))