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drm/amdgpu/gfx12: per queue reset only on bare metal

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It's not supported under SR-IOV at the moment.

Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2024-07-18 10:22:00 -04:00
parent 01163079e1
commit 1a1995b1dc
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
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@@ -5163,6 +5163,9 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
struct amdgpu_device *adev = ring->adev;
int r;
if (amdgpu_sriov_vf(adev))
return -EINVAL;
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
if (r) {
dev_err(adev->dev, "reset via MES failed %d\n", r);
@@ -5200,6 +5203,9 @@ static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)
struct amdgpu_device *adev = ring->adev;
int r, i;
if (amdgpu_sriov_vf(adev))
return -EINVAL;
gfx_v12_0_set_safe_mode(adev, 0);
mutex_lock(&adev->srbm_mutex);
soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);