mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-07 08:03:00 -04:00
Merge branch 'mlx5-misc-fixes'
Tariq Toukan says:
====================
mlx5 misc fixes
This patchset provides bug fixes to mlx5 driver.
This is V2 of the series previously submitted as PR by Saeed:
https://lore.kernel.org/netdev/20240326144646.2078893-1-saeed@kernel.org/T/
Series generated against:
commit 237f3cf13b ("xsk: validate user input for XDP_{UMEM|COMPLETION}_FILL_RING")
====================
Link: https://lore.kernel.org/r/20240409190820.227554-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
@@ -95,9 +95,15 @@ static inline void mlx5e_ptp_metadata_fifo_push(struct mlx5e_ptp_metadata_fifo *
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}
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static inline u8
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mlx5e_ptp_metadata_fifo_peek(struct mlx5e_ptp_metadata_fifo *fifo)
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{
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return fifo->data[fifo->mask & fifo->cc];
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}
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static inline void
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mlx5e_ptp_metadata_fifo_pop(struct mlx5e_ptp_metadata_fifo *fifo)
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{
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return fifo->data[fifo->mask & fifo->cc++];
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fifo->cc++;
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}
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static inline void
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@@ -83,24 +83,25 @@ int mlx5e_open_qos_sq(struct mlx5e_priv *priv, struct mlx5e_channels *chs,
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txq_ix = mlx5e_qid_from_qos(chs, node_qid);
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WARN_ON(node_qid > priv->htb_max_qos_sqs);
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if (node_qid == priv->htb_max_qos_sqs) {
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struct mlx5e_sq_stats *stats, **stats_list = NULL;
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WARN_ON(node_qid >= mlx5e_htb_cur_leaf_nodes(priv->htb));
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if (!priv->htb_qos_sq_stats) {
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struct mlx5e_sq_stats **stats_list;
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if (priv->htb_max_qos_sqs == 0) {
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stats_list = kvcalloc(mlx5e_qos_max_leaf_nodes(priv->mdev),
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sizeof(*stats_list),
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GFP_KERNEL);
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if (!stats_list)
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return -ENOMEM;
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}
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stats = kzalloc(sizeof(*stats), GFP_KERNEL);
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if (!stats) {
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kvfree(stats_list);
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stats_list = kvcalloc(mlx5e_qos_max_leaf_nodes(priv->mdev),
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sizeof(*stats_list), GFP_KERNEL);
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if (!stats_list)
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return -ENOMEM;
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}
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if (stats_list)
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WRITE_ONCE(priv->htb_qos_sq_stats, stats_list);
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WRITE_ONCE(priv->htb_qos_sq_stats, stats_list);
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}
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if (!priv->htb_qos_sq_stats[node_qid]) {
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struct mlx5e_sq_stats *stats;
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stats = kzalloc(sizeof(*stats), GFP_KERNEL);
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if (!stats)
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return -ENOMEM;
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WRITE_ONCE(priv->htb_qos_sq_stats[node_qid], stats);
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/* Order htb_max_qos_sqs increment after writing the array pointer.
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* Pairs with smp_load_acquire in en_stats.c.
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@@ -179,6 +179,13 @@ u32 mlx5e_rqt_size(struct mlx5_core_dev *mdev, unsigned int num_channels)
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return min_t(u32, rqt_size, max_cap_rqt_size);
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}
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#define MLX5E_MAX_RQT_SIZE_ALLOWED_WITH_XOR8_HASH 256
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unsigned int mlx5e_rqt_max_num_channels_allowed_for_xor8(void)
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{
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return MLX5E_MAX_RQT_SIZE_ALLOWED_WITH_XOR8_HASH / MLX5E_UNIFORM_SPREAD_RQT_FACTOR;
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}
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void mlx5e_rqt_destroy(struct mlx5e_rqt *rqt)
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{
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mlx5_core_destroy_rqt(rqt->mdev, rqt->rqtn);
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@@ -38,6 +38,7 @@ static inline u32 mlx5e_rqt_get_rqtn(struct mlx5e_rqt *rqt)
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}
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u32 mlx5e_rqt_size(struct mlx5_core_dev *mdev, unsigned int num_channels);
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unsigned int mlx5e_rqt_max_num_channels_allowed_for_xor8(void);
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int mlx5e_rqt_redirect_direct(struct mlx5e_rqt *rqt, u32 rqn, u32 *vhca_id);
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int mlx5e_rqt_redirect_indir(struct mlx5e_rqt *rqt, u32 *rqns, u32 *vhca_ids,
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unsigned int num_rqns,
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@@ -57,6 +57,7 @@ int mlx5e_selq_init(struct mlx5e_selq *selq, struct mutex *state_lock)
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void mlx5e_selq_cleanup(struct mlx5e_selq *selq)
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{
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mutex_lock(selq->state_lock);
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WARN_ON_ONCE(selq->is_prepared);
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kvfree(selq->standby);
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@@ -67,6 +68,7 @@ void mlx5e_selq_cleanup(struct mlx5e_selq *selq)
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kvfree(selq->standby);
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selq->standby = NULL;
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mutex_unlock(selq->state_lock);
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}
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void mlx5e_selq_prepare_params(struct mlx5e_selq *selq, struct mlx5e_params *params)
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@@ -451,6 +451,34 @@ int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
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mutex_lock(&priv->state_lock);
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if (mlx5e_rx_res_get_current_hash(priv->rx_res).hfunc == ETH_RSS_HASH_XOR) {
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unsigned int xor8_max_channels = mlx5e_rqt_max_num_channels_allowed_for_xor8();
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if (count > xor8_max_channels) {
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err = -EINVAL;
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netdev_err(priv->netdev, "%s: Requested number of channels (%d) exceeds the maximum allowed by the XOR8 RSS hfunc (%d)\n",
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__func__, count, xor8_max_channels);
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goto out;
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}
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}
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/* If RXFH is configured, changing the channels number is allowed only if
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* it does not require resizing the RSS table. This is because the previous
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* configuration may no longer be compatible with the new RSS table.
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*/
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if (netif_is_rxfh_configured(priv->netdev)) {
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int cur_rqt_size = mlx5e_rqt_size(priv->mdev, cur_params->num_channels);
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int new_rqt_size = mlx5e_rqt_size(priv->mdev, count);
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if (new_rqt_size != cur_rqt_size) {
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err = -EINVAL;
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netdev_err(priv->netdev,
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"%s: RXFH is configured, block changing channels number that affects RSS table size (new: %d, current: %d)\n",
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__func__, new_rqt_size, cur_rqt_size);
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goto out;
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}
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}
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/* Don't allow changing the number of channels if HTB offload is active,
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* because the numeration of the QoS SQs will change, while per-queue
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* qdiscs are attached.
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@@ -1281,17 +1309,30 @@ int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,
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struct mlx5e_priv *priv = netdev_priv(dev);
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u32 *rss_context = &rxfh->rss_context;
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u8 hfunc = rxfh->hfunc;
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unsigned int count;
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int err;
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mutex_lock(&priv->state_lock);
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count = priv->channels.params.num_channels;
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if (hfunc == ETH_RSS_HASH_XOR) {
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unsigned int xor8_max_channels = mlx5e_rqt_max_num_channels_allowed_for_xor8();
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if (count > xor8_max_channels) {
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err = -EINVAL;
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netdev_err(priv->netdev, "%s: Cannot set RSS hash function to XOR, current number of channels (%d) exceeds the maximum allowed for XOR8 RSS hfunc (%d)\n",
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__func__, count, xor8_max_channels);
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goto unlock;
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}
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}
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if (*rss_context && rxfh->rss_delete) {
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err = mlx5e_rx_res_rss_destroy(priv->rx_res, *rss_context);
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goto unlock;
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}
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if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {
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unsigned int count = priv->channels.params.num_channels;
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err = mlx5e_rx_res_rss_init(priv->rx_res, rss_context, count);
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if (err)
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goto unlock;
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@@ -5726,9 +5726,7 @@ void mlx5e_priv_cleanup(struct mlx5e_priv *priv)
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kfree(priv->tx_rates);
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kfree(priv->txq2sq);
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destroy_workqueue(priv->wq);
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mutex_lock(&priv->state_lock);
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mlx5e_selq_cleanup(&priv->selq);
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mutex_unlock(&priv->state_lock);
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free_cpumask_var(priv->scratchpad.cpumask);
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for (i = 0; i < priv->htb_max_qos_sqs; i++)
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@@ -398,6 +398,8 @@ mlx5e_txwqe_complete(struct mlx5e_txqsq *sq, struct sk_buff *skb,
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(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) {
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u8 metadata_index = be32_to_cpu(eseg->flow_table_metadata);
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mlx5e_ptp_metadata_fifo_pop(&sq->ptpsq->metadata_freelist);
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mlx5e_skb_cb_hwtstamp_init(skb);
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mlx5e_ptp_metadata_map_put(&sq->ptpsq->metadata_map, skb,
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metadata_index);
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@@ -496,9 +498,6 @@ mlx5e_sq_xmit_wqe(struct mlx5e_txqsq *sq, struct sk_buff *skb,
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err_drop:
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stats->dropped++;
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if (unlikely(sq->ptpsq && (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
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mlx5e_ptp_metadata_fifo_push(&sq->ptpsq->metadata_freelist,
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be32_to_cpu(eseg->flow_table_metadata));
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dev_kfree_skb_any(skb);
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mlx5e_tx_flush(sq);
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}
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@@ -657,7 +656,7 @@ static void mlx5e_cqe_ts_id_eseg(struct mlx5e_ptpsq *ptpsq, struct sk_buff *skb,
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{
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if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
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eseg->flow_table_metadata =
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cpu_to_be32(mlx5e_ptp_metadata_fifo_pop(&ptpsq->metadata_freelist));
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cpu_to_be32(mlx5e_ptp_metadata_fifo_peek(&ptpsq->metadata_freelist));
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}
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static void mlx5e_txwqe_build_eseg(struct mlx5e_priv *priv, struct mlx5e_txqsq *sq,
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@@ -1868,6 +1868,7 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)
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if (err)
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goto abort;
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dev->priv.eswitch = esw;
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err = esw_offloads_init(esw);
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if (err)
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goto reps_err;
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@@ -1892,11 +1893,6 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)
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esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
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else
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esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
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if (MLX5_ESWITCH_MANAGER(dev) &&
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mlx5_esw_vport_match_metadata_supported(esw))
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esw->flags |= MLX5_ESWITCH_VPORT_MATCH_METADATA;
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dev->priv.eswitch = esw;
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BLOCKING_INIT_NOTIFIER_HEAD(&esw->n_head);
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esw_info(dev,
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@@ -1908,6 +1904,7 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)
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reps_err:
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mlx5_esw_vports_cleanup(esw);
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dev->priv.eswitch = NULL;
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abort:
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if (esw->work_queue)
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destroy_workqueue(esw->work_queue);
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@@ -1926,7 +1923,6 @@ void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
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esw_info(esw->dev, "cleanup\n");
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esw->dev->priv.eswitch = NULL;
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destroy_workqueue(esw->work_queue);
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WARN_ON(refcount_read(&esw->qos.refcnt));
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mutex_destroy(&esw->state_lock);
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@@ -1937,6 +1933,7 @@ void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
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mutex_destroy(&esw->offloads.encap_tbl_lock);
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mutex_destroy(&esw->offloads.decap_tbl_lock);
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esw_offloads_cleanup(esw);
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esw->dev->priv.eswitch = NULL;
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mlx5_esw_vports_cleanup(esw);
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debugfs_remove_recursive(esw->debugfs_root);
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devl_params_unregister(priv_to_devlink(esw->dev), mlx5_eswitch_params,
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@@ -43,6 +43,7 @@
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#include "rdma.h"
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#include "en.h"
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#include "fs_core.h"
|
||||
#include "lib/mlx5.h"
|
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#include "lib/devcom.h"
|
||||
#include "lib/eq.h"
|
||||
#include "lib/fs_chains.h"
|
||||
@@ -2476,6 +2477,10 @@ int esw_offloads_init(struct mlx5_eswitch *esw)
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
if (MLX5_ESWITCH_MANAGER(esw->dev) &&
|
||||
mlx5_esw_vport_match_metadata_supported(esw))
|
||||
esw->flags |= MLX5_ESWITCH_VPORT_MATCH_METADATA;
|
||||
|
||||
err = devl_params_register(priv_to_devlink(esw->dev),
|
||||
esw_devlink_params,
|
||||
ARRAY_SIZE(esw_devlink_params));
|
||||
@@ -3707,6 +3712,12 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
|
||||
if (esw_mode_from_devlink(mode, &mlx5_mode))
|
||||
return -EINVAL;
|
||||
|
||||
if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV && mlx5_get_sd(esw->dev)) {
|
||||
NL_SET_ERR_MSG_MOD(extack,
|
||||
"Can't change E-Switch mode to switchdev when multi-PF netdev (Socket Direct) is configured.");
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
mlx5_lag_disable_change(esw->dev);
|
||||
err = mlx5_esw_try_lock(esw);
|
||||
if (err < 0) {
|
||||
|
||||
@@ -1664,6 +1664,16 @@ static int create_auto_flow_group(struct mlx5_flow_table *ft,
|
||||
return err;
|
||||
}
|
||||
|
||||
static bool mlx5_pkt_reformat_cmp(struct mlx5_pkt_reformat *p1,
|
||||
struct mlx5_pkt_reformat *p2)
|
||||
{
|
||||
return p1->owner == p2->owner &&
|
||||
(p1->owner == MLX5_FLOW_RESOURCE_OWNER_FW ?
|
||||
p1->id == p2->id :
|
||||
mlx5_fs_dr_action_get_pkt_reformat_id(p1) ==
|
||||
mlx5_fs_dr_action_get_pkt_reformat_id(p2));
|
||||
}
|
||||
|
||||
static bool mlx5_flow_dests_cmp(struct mlx5_flow_destination *d1,
|
||||
struct mlx5_flow_destination *d2)
|
||||
{
|
||||
@@ -1675,8 +1685,8 @@ static bool mlx5_flow_dests_cmp(struct mlx5_flow_destination *d1,
|
||||
((d1->vport.flags & MLX5_FLOW_DEST_VPORT_VHCA_ID) ?
|
||||
(d1->vport.vhca_id == d2->vport.vhca_id) : true) &&
|
||||
((d1->vport.flags & MLX5_FLOW_DEST_VPORT_REFORMAT_ID) ?
|
||||
(d1->vport.pkt_reformat->id ==
|
||||
d2->vport.pkt_reformat->id) : true)) ||
|
||||
mlx5_pkt_reformat_cmp(d1->vport.pkt_reformat,
|
||||
d2->vport.pkt_reformat) : true)) ||
|
||||
(d1->type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE &&
|
||||
d1->ft == d2->ft) ||
|
||||
(d1->type == MLX5_FLOW_DESTINATION_TYPE_TIR &&
|
||||
@@ -1808,8 +1818,9 @@ static struct mlx5_flow_handle *add_rule_fg(struct mlx5_flow_group *fg,
|
||||
}
|
||||
trace_mlx5_fs_set_fte(fte, false);
|
||||
|
||||
/* Link newly added rules into the tree. */
|
||||
for (i = 0; i < handle->num_rules; i++) {
|
||||
if (refcount_read(&handle->rule[i]->node.refcount) == 1) {
|
||||
if (!handle->rule[i]->node.parent) {
|
||||
tree_add_node(&handle->rule[i]->node, &fte->node);
|
||||
trace_mlx5_fs_add_rule(handle->rule[i]);
|
||||
}
|
||||
|
||||
@@ -1480,6 +1480,14 @@ int mlx5_init_one_devl_locked(struct mlx5_core_dev *dev)
|
||||
if (err)
|
||||
goto err_register;
|
||||
|
||||
err = mlx5_crdump_enable(dev);
|
||||
if (err)
|
||||
mlx5_core_err(dev, "mlx5_crdump_enable failed with error code %d\n", err);
|
||||
|
||||
err = mlx5_hwmon_dev_register(dev);
|
||||
if (err)
|
||||
mlx5_core_err(dev, "mlx5_hwmon_dev_register failed with error code %d\n", err);
|
||||
|
||||
mutex_unlock(&dev->intf_state_mutex);
|
||||
return 0;
|
||||
|
||||
@@ -1505,7 +1513,10 @@ int mlx5_init_one(struct mlx5_core_dev *dev)
|
||||
int err;
|
||||
|
||||
devl_lock(devlink);
|
||||
devl_register(devlink);
|
||||
err = mlx5_init_one_devl_locked(dev);
|
||||
if (err)
|
||||
devl_unregister(devlink);
|
||||
devl_unlock(devlink);
|
||||
return err;
|
||||
}
|
||||
@@ -1517,6 +1528,8 @@ void mlx5_uninit_one(struct mlx5_core_dev *dev)
|
||||
devl_lock(devlink);
|
||||
mutex_lock(&dev->intf_state_mutex);
|
||||
|
||||
mlx5_hwmon_dev_unregister(dev);
|
||||
mlx5_crdump_disable(dev);
|
||||
mlx5_unregister_device(dev);
|
||||
|
||||
if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
|
||||
@@ -1534,6 +1547,7 @@ void mlx5_uninit_one(struct mlx5_core_dev *dev)
|
||||
mlx5_function_teardown(dev, true);
|
||||
out:
|
||||
mutex_unlock(&dev->intf_state_mutex);
|
||||
devl_unregister(devlink);
|
||||
devl_unlock(devlink);
|
||||
}
|
||||
|
||||
@@ -1680,16 +1694,20 @@ int mlx5_init_one_light(struct mlx5_core_dev *dev)
|
||||
}
|
||||
|
||||
devl_lock(devlink);
|
||||
devl_register(devlink);
|
||||
|
||||
err = mlx5_devlink_params_register(priv_to_devlink(dev));
|
||||
devl_unlock(devlink);
|
||||
if (err) {
|
||||
mlx5_core_warn(dev, "mlx5_devlink_param_reg err = %d\n", err);
|
||||
goto query_hca_caps_err;
|
||||
}
|
||||
|
||||
devl_unlock(devlink);
|
||||
return 0;
|
||||
|
||||
query_hca_caps_err:
|
||||
devl_unregister(devlink);
|
||||
devl_unlock(devlink);
|
||||
mlx5_function_disable(dev, true);
|
||||
out:
|
||||
dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
|
||||
@@ -1702,6 +1720,7 @@ void mlx5_uninit_one_light(struct mlx5_core_dev *dev)
|
||||
|
||||
devl_lock(devlink);
|
||||
mlx5_devlink_params_unregister(priv_to_devlink(dev));
|
||||
devl_unregister(devlink);
|
||||
devl_unlock(devlink);
|
||||
if (dev->state != MLX5_DEVICE_STATE_UP)
|
||||
return;
|
||||
@@ -1943,16 +1962,7 @@ static int probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
goto err_init_one;
|
||||
}
|
||||
|
||||
err = mlx5_crdump_enable(dev);
|
||||
if (err)
|
||||
dev_err(&pdev->dev, "mlx5_crdump_enable failed with error code %d\n", err);
|
||||
|
||||
err = mlx5_hwmon_dev_register(dev);
|
||||
if (err)
|
||||
mlx5_core_err(dev, "mlx5_hwmon_dev_register failed with error code %d\n", err);
|
||||
|
||||
pci_save_state(pdev);
|
||||
devlink_register(devlink);
|
||||
return 0;
|
||||
|
||||
err_init_one:
|
||||
@@ -1973,16 +1983,9 @@ static void remove_one(struct pci_dev *pdev)
|
||||
struct devlink *devlink = priv_to_devlink(dev);
|
||||
|
||||
set_bit(MLX5_BREAK_FW_WAIT, &dev->intf_state);
|
||||
/* mlx5_drain_fw_reset() and mlx5_drain_health_wq() are using
|
||||
* devlink notify APIs.
|
||||
* Hence, we must drain them before unregistering the devlink.
|
||||
*/
|
||||
mlx5_drain_fw_reset(dev);
|
||||
mlx5_drain_health_wq(dev);
|
||||
devlink_unregister(devlink);
|
||||
mlx5_sriov_disable(pdev, false);
|
||||
mlx5_hwmon_dev_unregister(dev);
|
||||
mlx5_crdump_disable(dev);
|
||||
mlx5_uninit_one(dev);
|
||||
mlx5_pci_close(dev);
|
||||
mlx5_mdev_uninit(dev);
|
||||
|
||||
@@ -19,6 +19,7 @@
|
||||
#define MLX5_IRQ_CTRL_SF_MAX 8
|
||||
/* min num of vectors for SFs to be enabled */
|
||||
#define MLX5_IRQ_VEC_COMP_BASE_SF 2
|
||||
#define MLX5_IRQ_VEC_COMP_BASE 1
|
||||
|
||||
#define MLX5_EQ_SHARE_IRQ_MAX_COMP (8)
|
||||
#define MLX5_EQ_SHARE_IRQ_MAX_CTRL (UINT_MAX)
|
||||
@@ -246,6 +247,7 @@ static void irq_set_name(struct mlx5_irq_pool *pool, char *name, int vecidx)
|
||||
return;
|
||||
}
|
||||
|
||||
vecidx -= MLX5_IRQ_VEC_COMP_BASE;
|
||||
snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", vecidx);
|
||||
}
|
||||
|
||||
@@ -585,7 +587,7 @@ struct mlx5_irq *mlx5_irq_request_vector(struct mlx5_core_dev *dev, u16 cpu,
|
||||
struct mlx5_irq_table *table = mlx5_irq_table_get(dev);
|
||||
struct mlx5_irq_pool *pool = table->pcif_pool;
|
||||
struct irq_affinity_desc af_desc;
|
||||
int offset = 1;
|
||||
int offset = MLX5_IRQ_VEC_COMP_BASE;
|
||||
|
||||
if (!pool->xa_num_irqs.max)
|
||||
offset = 0;
|
||||
|
||||
@@ -101,7 +101,6 @@ static void mlx5_sf_dev_remove(struct auxiliary_device *adev)
|
||||
devlink = priv_to_devlink(mdev);
|
||||
set_bit(MLX5_BREAK_FW_WAIT, &mdev->intf_state);
|
||||
mlx5_drain_health_wq(mdev);
|
||||
devlink_unregister(devlink);
|
||||
if (mlx5_dev_is_lightweight(mdev))
|
||||
mlx5_uninit_one_light(mdev);
|
||||
else
|
||||
|
||||
Reference in New Issue
Block a user