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drm/i915/dp: Pass atomic state to link training function

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The next patch adds sending a modeset-retry uevent after a link training
failure to all MST connectors on link. This requires the atomic state,
so pass it to intel_dp_start_link_train(). In case of SST where
retraining still happens by calling this function directly instead of a
modeset commit the atomic state is not available and NULL is passed
instead. This is ok, since in this case the encoder's only DP connector
is available from intel_dp->attached_connector not requiring the atomic
state.

v2: Add NOTE that the atomic state may not be valid for SST links and
    assert that it's valid for MST links. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240610164933.2947366-10-imre.deak@intel.com
This commit is contained in:
Imre Deak
2024-06-10 19:49:21 +03:00
committed by Imre Deak
parent 5bd3e7ea88
commit 182c6be08b
5 changed files with 18 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/display/g4x_dp.c
View File

@@ -707,7 +707,7 @@ static void intel_enable_dp(struct intel_atomic_state *state,
intel_dp_configure_protocol_converter(intel_dp, pipe_config);
intel_dp_check_frl_training(intel_dp);
intel_dp_pcon_dsc_configure(intel_dp, pipe_config);
intel_dp_start_link_train(intel_dp, pipe_config);
intel_dp_start_link_train(state, intel_dp, pipe_config);
intel_dp_stop_link_train(intel_dp, pipe_config);
}

6
drivers/gpu/drm/i915/display/intel_ddi.c
View File

@@ -2596,7 +2596,7 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
* Pattern, wait for 5 idle patterns (DP_TP_STATUS Min_Idles_Sent)
* (timeout after 800 us)
*/
intel_dp_start_link_train(intel_dp, crtc_state);
intel_dp_start_link_train(state, intel_dp, crtc_state);
/* 6.n Set DP_TP_CTL link training to Normal */
if (!is_trans_port_sync_mode(crtc_state))
@@ -2738,7 +2738,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
* Pattern, wait for 5 idle patterns (DP_TP_STATUS Min_Idles_Sent)
* (timeout after 800 us)
*/
intel_dp_start_link_train(intel_dp, crtc_state);
intel_dp_start_link_train(state, intel_dp, crtc_state);
/* 7.k Set DP_TP_CTL link training to Normal */
if (!is_trans_port_sync_mode(crtc_state))
@@ -2805,7 +2805,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
to_intel_connector(conn_state->connector),
crtc_state);
intel_dp_sink_set_fec_ready(intel_dp, crtc_state, true);
intel_dp_start_link_train(intel_dp, crtc_state);
intel_dp_start_link_train(state, intel_dp, crtc_state);
if ((port != PORT_A || DISPLAY_VER(dev_priv) >= 9) &&
!is_trans_port_sync_mode(crtc_state))
intel_dp_stop_link_train(intel_dp, crtc_state);

2
drivers/gpu/drm/i915/display/intel_dp.c
View File

@@ -5233,7 +5233,7 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
intel_dp_check_frl_training(intel_dp);
intel_dp_pcon_dsc_configure(intel_dp, crtc_state);
intel_dp_start_link_train(intel_dp, crtc_state);
intel_dp_start_link_train(NULL, intel_dp, crtc_state);
intel_dp_stop_link_train(intel_dp, crtc_state);
break;
}

11
drivers/gpu/drm/i915/display/intel_dp_link_training.c
View File

@@ -1453,6 +1453,7 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp,
/**
* intel_dp_start_link_train - start link training
* @state: Atomic state
* @intel_dp: DP struct
* @crtc_state: state for CRTC attached to the encoder
*
@@ -1460,8 +1461,11 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp,
* retraining with reduced link rate/lane parameters if the link training
* fails.
* After calling this function intel_dp_stop_link_train() must be called.
*
* NOTE: @state is only valid for MST links and can be %NULL for SST.
*/
void intel_dp_start_link_train(struct intel_dp *intel_dp,
void intel_dp_start_link_train(struct intel_atomic_state *state,
struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
@@ -1475,6 +1479,11 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
*/
int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
if (drm_WARN_ON(&i915->drm,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST) &&
!state))
return;
if (lttpr_count < 0)
/* Still continue with enabling the port and link training. */
lttpr_count = 0;

4
drivers/gpu/drm/i915/display/intel_dp_link_training.h
View File

@@ -8,6 +8,7 @@
#include <drm/display/drm_dp_helper.h>
struct intel_atomic_state;
struct intel_crtc_state;
struct intel_dp;
@@ -25,7 +26,8 @@ void intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy);
void intel_dp_start_link_train(struct intel_dp *intel_dp,
void intel_dp_start_link_train(struct intel_atomic_state *state,
struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_dp_stop_link_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);