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drm/amdgpu: dont pin wptr bo instead use eviction fence
Instead of pinning the wptr bo attach the eviction fence to
the bo to make sure it remains valid all the time.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 7264bc10c7)
This commit is contained in:
committed by
Alex Deucher
parent
6e7566ba47
commit
17da841055
@@ -965,6 +965,7 @@ amdgpu_userq_vm_validate(struct amdgpu_userq_mgr *uq_mgr)
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struct amdgpu_vm *vm = &fpriv->vm;
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unsigned long key, tmp_key;
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struct amdgpu_bo_va *bo_va;
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struct amdgpu_usermode_queue *queue;
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struct amdgpu_bo *bo;
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struct drm_exec exec;
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struct xarray xa;
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@@ -1080,6 +1081,24 @@ amdgpu_userq_vm_validate(struct amdgpu_userq_mgr *uq_mgr)
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dma_fence_wait(bo_va->last_pt_update, false);
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dma_fence_wait(vm->last_update, false);
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xa_for_each(&uq_mgr->userq_xa, tmp_key, queue) {
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bo = queue->wptr_obj.obj;
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if (!bo) {
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ret = -EINVAL;
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goto unlock_all;
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}
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ret = amdgpu_ttm_alloc_gart(&bo->tbo);
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if (unlikely(ret)) {
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drm_file_err(uq_mgr->file,
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"failed to bind wptr bo to gart on resume, qid=%lu ret=%d\n",
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tmp_key, ret);
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goto unlock_all;
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}
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queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(bo);
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}
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ret = amdgpu_evf_mgr_rearm(&fpriv->evf_mgr, &exec);
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if (ret)
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drm_file_err(uq_mgr->file, "Failed to replace eviction fence\n");
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@@ -70,27 +70,23 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
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ret = -EINVAL;
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goto fail_map;
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}
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/* TODO use eviction fence instead of pinning. */
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ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
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/* Keep WPTR BO under eviction-fence control instead of pinning. */
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ret = amdgpu_evf_mgr_attach_fence(&uq_mgr_to_fpriv(uq_mgr)->evf_mgr, wptr_obj->obj);
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if (ret) {
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DRM_ERROR("Failed to pin wptr bo. ret %d\n", ret);
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DRM_ERROR("Failed to attach eviction fence to wptr bo. ret %d\n", ret);
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goto fail_map;
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}
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ret = amdgpu_ttm_alloc_gart(&wptr_obj->obj->tbo);
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if (ret) {
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DRM_ERROR("Failed to bind bo to GART. ret %d\n", ret);
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goto fail_alloc_gart;
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DRM_ERROR("Failed to bind wptr bo to GART. ret %d\n", ret);
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goto fail_map;
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}
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queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
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drm_exec_fini(&exec);
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return 0;
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fail_alloc_gart:
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amdgpu_bo_unpin(wptr_obj->obj);
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fail_map:
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amdgpu_bo_unref(&wptr_obj->obj);
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fail_lock:
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@@ -468,9 +464,6 @@ static void mes_userq_mqd_destroy(struct amdgpu_usermode_queue *queue)
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amdgpu_bo_free_kernel(&queue->mqd.obj, &queue->mqd.gpu_addr,
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&queue->mqd.cpu_ptr);
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amdgpu_bo_reserve(queue->wptr_obj.obj, true);
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amdgpu_bo_unpin(queue->wptr_obj.obj);
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amdgpu_bo_unreserve(queue->wptr_obj.obj);
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amdgpu_bo_unref(&queue->wptr_obj.obj);
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}
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