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soc: qcom: ubwc: use fixed values for UBWC swizzle for UBWC < 4.0

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UBWC devices before 4.0 use standard UBWC swizzle levels. As all the
drivers now use the qcom_ubwc_swizzle() helper, move those values to the
helper, leaving UBWC 4.0+ intact for now.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-26-72f2749bc807@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2026-05-20 17:51:33 +03:00
committed by Bjorn Andersson
parent fc54caf87a
commit 17120525ff
2 changed files with 24 additions and 43 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/soc/qcom/ubwc_config.c
View File

@@ -33,17 +33,11 @@ static const struct qcom_ubwc_cfg_data kaanapali_data = {
static const struct qcom_ubwc_cfg_data msm8937_data = {
.ubwc_enc_version = UBWC_1_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data msm8998_data = {
.ubwc_enc_version = UBWC_1_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
};
@@ -60,94 +54,66 @@ static const struct qcom_ubwc_cfg_data sa8775p_data = {
static const struct qcom_ubwc_cfg_data sar2130p_data = {
.ubwc_enc_version = UBWC_3_1,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 13,
};
static const struct qcom_ubwc_cfg_data sc7180_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sc7280_data = {
.ubwc_enc_version = UBWC_3_1,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sc8180x_data = {
.ubwc_enc_version = UBWC_3_1,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
};
static const struct qcom_ubwc_cfg_data sc8280xp_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
};
static const struct qcom_ubwc_cfg_data sdm670_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sdm845_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
};
static const struct qcom_ubwc_cfg_data sm6115_data = {
.ubwc_enc_version = UBWC_1_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm6125_data = {
.ubwc_enc_version = UBWC_1_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm6150_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm6350_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm7150_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm8150_data = {
.ubwc_enc_version = UBWC_3_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
};

33
include/linux/soc/qcom/ubwc.h
View File

@@ -22,9 +22,6 @@ struct qcom_ubwc_cfg_data {
* UBWC 4.0 adds the optional ability to disable levels 2 & 3.
*/
u32 ubwc_swizzle;
#define UBWC_SWIZZLE_ENABLE_LVL1 BIT(0)
#define UBWC_SWIZZLE_ENABLE_LVL2 BIT(1)
#define UBWC_SWIZZLE_ENABLE_LVL3 BIT(2)
/**
* @highest_bank_bit: Highest Bank Bit
@@ -55,12 +52,7 @@ static inline const struct qcom_ubwc_cfg_data *qcom_ubwc_config_get_data(void)
static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
{
bool ret = cfg->ubwc_enc_version == UBWC_1_0;
if (ret && !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL1))
pr_err("UBWC config discrepancy - level 1 swizzling disabled on UBWC 1.0\n");
return ret;
return cfg->ubwc_enc_version == UBWC_1_0;
}
static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data *cfg)
@@ -85,8 +77,31 @@ static inline bool qcom_ubwc_bank_spread(const struct qcom_ubwc_cfg_data *cfg)
return true;
}
#define UBWC_SWIZZLE_ENABLE_LVL1 BIT(0)
#define UBWC_SWIZZLE_ENABLE_LVL2 BIT(1)
#define UBWC_SWIZZLE_ENABLE_LVL3 BIT(2)
/**
* @qcom_ubwc_swizzle: Whether to enable level 1, 2 & 3 bank swizzling.
*
* UBWC 1.0 always enables all three levels.
* UBWC 2.0 removes level 1 bank swizzling, leaving levels 2 & 3.
* UBWC 4.0 adds the optional ability to disable levels 2 & 3.
*/
static inline u32 qcom_ubwc_swizzle(const struct qcom_ubwc_cfg_data *cfg)
{
if (cfg->ubwc_enc_version == 0)
return 0;
if (cfg->ubwc_enc_version == UBWC_1_0)
return UBWC_SWIZZLE_ENABLE_LVL1 |
UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3;
if (cfg->ubwc_enc_version < UBWC_4_0)
return UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3;
return cfg->ubwc_swizzle;
}