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staging: rtl8723bs: fix multiple blank lines in hal/Hal* files

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Remove multiple consecutive blank lines in hal/Hal* source and header
files.

This fixes the following checkpatch.pl check:
CHECK: Please don't use multiple blank lines

Signed-off-by: Jennifer Guo <guojy.bj@gmail.com>
Link: https://patch.msgid.link/20260514180642.4608-1-guojy.bj@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jennifer Guo
2026-05-14 11:06:42 -07:00
committed by Greg Kroah-Hartman
parent 3ad4b506f4
commit 16e3162240
10 changed files with 0 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c
View File

@@ -235,8 +235,6 @@ static void halbtc8723b1ant_LimitedRx(
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
/* real update aggregation setting */
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
}
static void halbtc8723b1ant_QueryBtInfo(struct btc_coexist *pBtCoexist)
@@ -298,7 +296,6 @@ static void halbtc8723b1ant_MonitorBtCtr(struct btc_coexist *pBtCoexist)
}
}
static void halbtc8723b1ant_MonitorWiFiCtr(struct btc_coexist *pBtCoexist)
{
s32 wifiRssi = 0;
@@ -333,7 +330,6 @@ static void halbtc8723b1ant_MonitorWiFiCtr(struct btc_coexist *pBtCoexist)
pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba);
}
/* reset counter */
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1);
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0);
@@ -381,8 +377,6 @@ static void halbtc8723b1ant_MonitorWiFiCtr(struct btc_coexist *pBtCoexist)
}
pCoexSta->bPreCCKLock = pCoexSta->bCCKLock;
}
static bool halbtc8723b1ant_IsWifiStatusChanged(struct btc_coexist *pBtCoexist)
@@ -880,7 +874,6 @@ static void halbtc8723b1ant_SetAntPath(
}
}
/* ext switch setting */
switch (antPosType) {
case BTC_ANT_PATH_WIFI:
@@ -930,7 +923,6 @@ static void halbtc8723b1ant_SetAntPath(
}
}
/* internal switch setting */
switch (antPosType) {
case BTC_ANT_PATH_WIFI:
@@ -991,7 +983,6 @@ static void halbtc8723b1ant_SetFwPstdma(
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
}
static void halbtc8723b1ant_PsTdma(
struct btc_coexist *pBtCoexist, bool bForceExec, bool bTurnOn, u8 type
)
@@ -1029,12 +1020,10 @@ static void halbtc8723b1ant_PsTdma(
psTdmaByte4Val = 0x10; /* 0x778 = d/1 toggle */
}
if (bTurnOn) {
if (pBtLinkInfo->bSlaveRole)
psTdmaByte4Val = psTdmaByte4Val | 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
switch (type) {
default:
halbtc8723b1ant_SetFwPstdma(
@@ -1320,7 +1309,6 @@ static bool halbtc8723b1ant_IsCommonAction(struct btc_coexist *pBtCoexist)
return bCommon;
}
static void halbtc8723b1ant_TdmaDurationAdjustForAcl(
struct btc_coexist *pBtCoexist, u8 wifiStatus
)
@@ -2041,7 +2029,6 @@ static void halbtc8723b1ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
return;
}
if (!bWifiConnected) {
bool bScan = false, bLink = false, bRoam = false;

5
drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c
View File

@@ -552,7 +552,6 @@ static void halbtc8723b2ant_SetSwFullTimeDacSwing(
halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
}
static void halbtc8723b2ant_DacSwing(
struct btc_coexist *pBtCoexist,
bool bForceExec,
@@ -600,7 +599,6 @@ static void halbtc8723b2ant_SetAgcTable(
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
}
/* RF Gain */
pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
if (bAgcTableEn) {
@@ -1637,7 +1635,6 @@ static void halbtc8723b2ant_ActionSco(struct btc_coexist *pBtCoexist)
}
}
static void halbtc8723b2ant_ActionHid(struct btc_coexist *pBtCoexist)
{
u8 wifiRssiState, btRssiState;
@@ -1885,7 +1882,6 @@ static void halbtc8723b2ant_ActionPanEdr(struct btc_coexist *pBtCoexist)
}
}
/* PAN(HS) only */
static void halbtc8723b2ant_ActionPanHs(struct btc_coexist *pBtCoexist)
{
@@ -2229,7 +2225,6 @@ static void halbtc8723b2ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
pCoexDm->bAutoTdmaAdjust = false;
}
switch (pCoexDm->curAlgorithm) {
case BT_8723B_2ANT_COEX_ALGO_SCO:
halbtc8723b2ant_ActionSco(pBtCoexist);

1
drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.h
View File

@@ -8,7 +8,6 @@
#ifndef __INC_MP_MAC_HW_IMG_8723B_H
#define __INC_MP_MAC_HW_IMG_8723B_H
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/

1
drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c
View File

@@ -310,7 +310,6 @@ void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(struct dm_odm_t *pDM_Odm)
{
struct odm_rf_cal_t *pRFCalibrateInfo = &pDM_Odm->RFCalibrateInfo;
memcpy(
pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P,
gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8723B,

1
drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.h
View File

@@ -8,7 +8,6 @@
#ifndef __INC_MP_RF_HW_IMG_8723B_H
#define __INC_MP_RF_HW_IMG_8723B_H
/******************************************************************************
* RadioA.TXT
******************************************************************************/

1
drivers/staging/rtl8723bs/hal/HalPhyRf.c
View File

@@ -70,7 +70,6 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter)
struct txpwrtrack_cfg c;
/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
u8 *deltaSwingTableIdx_TUP_A;
u8 *deltaSwingTableIdx_TDOWN_A;

1
drivers/staging/rtl8723bs/hal/HalPhyRf.h
View File

@@ -32,7 +32,6 @@ struct txpwrtrack_cfg {
void ConfigureTxpowerTrack(struct dm_odm_t *pDM_Odm, struct txpwrtrack_cfg *pConfig);
void ODM_ClearTxPowerTrackingState(struct dm_odm_t *pDM_Odm);
void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter);

27
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
View File

@@ -39,7 +39,6 @@ static u8 DeltaSwingTableIdx_2GA_P_8188E[] = {
/* 3 Tx Power Tracking */
/* 3 ============================================================ */
static void setIqkMatrix_8723B(
struct dm_odm_t *pDM_Odm,
u8 OFDM_index,
@@ -118,7 +117,6 @@ static void setIqkMatrix_8723B(
}
}
static void setCCKFilterCoefficient(struct dm_odm_t *pDM_Odm, u8 CCKSwingIndex)
{
u8 (*swingtable)[8];
@@ -322,7 +320,6 @@ static void GetDeltaSwingTable_8723B(
}
}
void ConfigureTxpowerTrack_8723B(struct txpwrtrack_cfg *pConfig)
{
pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE;
@@ -414,13 +411,11 @@ static u8 phy_PathA_IQK_8723B(
/* leave IQK mode */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
/* Check failed */
regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord);
regE94 = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord);
regE9C = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord);
/* Allen 20131125 */
tmp = (regE9C & 0x03FF0000)>>16;
if ((tmp & 0x200) > 0)
@@ -553,7 +548,6 @@ static u8 phy_PathA_RxIQK8723B(
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x55, bRFRegOffsetMask, 0x4021f);
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
@@ -652,8 +646,6 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter)
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1);
/* 1 Tx IQK */
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
@@ -746,12 +738,10 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fcd);
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
/* path-B IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
@@ -781,7 +771,6 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
/* delay x ms */
/* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */
mdelay(IQK_DELAY_TIME_8723B);
@@ -889,8 +878,6 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */
/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180); */
/* Allen 20131125 */
tmp = (regEAC & 0x03FF0000)>>16;
if ((tmp & 0x200) > 0)
@@ -1114,7 +1101,6 @@ static void _PHY_SaveADDARegisters8723B(
}
}
static void _PHY_SaveMACRegisters8723B(
struct adapter *padapter, u32 *MACReg, u32 *MACBackup
)
@@ -1130,7 +1116,6 @@ static void _PHY_SaveMACRegisters8723B(
}
static void _PHY_ReloadADDARegisters8723B(
struct adapter *padapter,
u32 *ADDAReg,
@@ -1159,7 +1144,6 @@ static void _PHY_ReloadMACRegisters8723B(
rtw_write32(padapter, MACReg[i], MACBackup[i]);
}
static void _PHY_PathADDAOn8723B(
struct adapter *padapter,
u32 *ADDAReg,
@@ -1283,8 +1267,6 @@ static bool phy_SimularityCompare_8723B(
}
}
static void phy_IQCalibrate_8723B(
struct adapter *padapter,
s32 result[][8],
@@ -1370,13 +1352,11 @@ static void phy_IQCalibrate_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); */
/* RX IQ calibration setting for 8723B D cut large current issue when leaving IPS */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
@@ -1481,7 +1461,6 @@ static void phy_IQCalibrate_8723B(
}
static void phy_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm, bool is2T)
{
u8 tmpReg;
@@ -1590,7 +1569,6 @@ void PHY_IQCalibrate_8723B(
if (pDM_Odm->RFCalibrateInfo.bIQKInProgress)
return;
pDM_Odm->RFCalibrateInfo.bIQKInProgress = true;
if (bRestore) {
@@ -1648,7 +1626,6 @@ void PHY_IQCalibrate_8723B(
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT11, 0x1); */
for (i = 0; i < 8; i++) {
result[0][i] = 0;
result[1][i] = 0;
@@ -1663,7 +1640,6 @@ void PHY_IQCalibrate_8723B(
is23simular = false;
is13simular = false;
for (i = 0; i < 3; i++) {
phy_IQCalibrate_8723B(padapter, result, i, Is2ant, RF_Path);
@@ -1766,7 +1742,6 @@ void PHY_IQCalibrate_8723B(
pDM_Odm->RFCalibrateInfo.bIQKInProgress = false;
}
void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm)
{
bool bSingleTone = false, bCarrierSuppression = false;
@@ -1786,9 +1761,7 @@ void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm)
pDM_Odm->RFCalibrateInfo.bLCKInProgress = true;
phy_LCCalibrate_8723B(pDM_Odm, false);
pDM_Odm->RFCalibrateInfo.bLCKInProgress = false;
}

2
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.h
View File

@@ -15,7 +15,6 @@
#define AVG_THERMAL_NUM_8723B 4
#define RF_T_METER_8723B 0x42 /* */
void ConfigureTxpowerTrack_8723B(struct txpwrtrack_cfg *pConfig);
void ODM_TxPwrTrackSetPwr_8723B(
@@ -46,7 +45,6 @@ void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm);
/* */
void PHY_DigitalPredistortion_8723B(struct adapter *padapter);
void _PHY_SaveADDARegisters_8723B(
struct adapter *padapter,
u32 *ADDAReg,

1
drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c
View File

@@ -23,7 +23,6 @@ Major Change History:
#include <drv_types.h>
#include <HalPwrSeqCmd.h>
/* */
/* Description: */
/* This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. */