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drm/i915/display: Selective fetch Y position on Region Early Transport

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Selective fetch Y position differs when Region Early Transport is
used. Use formula from Bspec for this.

Bspec: 68927

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-5-jouni.hogander@intel.com
This commit is contained in:
Jouni Högander
2024-05-29 12:38:47 +03:00
parent 0a8c581ce0
commit 16b65af8b7
1 changed files with 5 additions and 1 deletions
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6
drivers/gpu/drm/i915/display/skl_universal_plane.c
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@@ -1302,7 +1302,11 @@ static void icl_plane_update_sel_fetch_noarm(struct intel_plane *plane,
clip = &plane_state->psr2_sel_fetch_area;
val = (clip->y1 + plane_state->uapi.dst.y1) << 16;
if (crtc_state->enable_psr2_su_region_et)
y = max(0, plane_state->uapi.dst.y1 - crtc_state->psr2_su_area.y1);
else
y = (clip->y1 + plane_state->uapi.dst.y1);
val = y << 16;
val |= plane_state->uapi.dst.x1;
intel_de_write_fw(i915, SEL_FETCH_PLANE_POS(pipe, plane->id), val);