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riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_KEY_IMA_EXT_0
Probing kernel support for Vector extension is available now. This only add detection for V only. Extenions like Zvfh, Zk are not in this scope. Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Evan Green <evan@rivosinc.com> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20230605110724.21391-4-andy.chiu@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
committed by
Palmer Dabbelt
parent
dc6667a4e7
commit
162e4df137
@@ -64,6 +64,9 @@ The following keys are defined:
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* :c:macro:`RISCV_HWPROBE_IMA_C`: The C extension is supported, as defined
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by version 2.2 of the RISC-V ISA manual.
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* :c:macro:`RISCV_HWPROBE_IMA_V`: The V extension is supported, as defined by
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version 1.0 of the RISC-V Vector extension manual.
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* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
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information about the selected set of processors.
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@@ -25,6 +25,7 @@ struct riscv_hwprobe {
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#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
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#define RISCV_HWPROBE_IMA_FD (1 << 0)
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#define RISCV_HWPROBE_IMA_C (1 << 1)
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#define RISCV_HWPROBE_IMA_V (1 << 2)
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#define RISCV_HWPROBE_KEY_CPUPERF_0 5
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#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
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#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
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@@ -10,6 +10,7 @@
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#include <asm/cpufeature.h>
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#include <asm/hwprobe.h>
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#include <asm/sbi.h>
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#include <asm/vector.h>
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#include <asm/switch_to.h>
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#include <asm/uaccess.h>
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#include <asm/unistd.h>
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@@ -171,6 +172,9 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair,
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if (riscv_isa_extension_available(NULL, c))
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pair->value |= RISCV_HWPROBE_IMA_C;
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if (has_vector())
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pair->value |= RISCV_HWPROBE_IMA_V;
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break;
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case RISCV_HWPROBE_KEY_CPUPERF_0:
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