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ARM: dts: exynos: correct MUIC interrupt trigger level on Midas family

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The Maxim MUIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 7eec126675 ("ARM: dts: Add Maxim 77693 PMIC to exynos4412-trats2")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-4-krzk@kernel.org
This commit is contained in:
Krzysztof Kozlowski
2020-12-10 22:25:20 +01:00
parent 8a45f33bd3
commit 15107e443a
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/exynos4412-midas.dtsi
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@@ -173,7 +173,7 @@ i2c_max77693: i2c-gpio-1 {
pmic@66 {
compatible = "maxim,max77693";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&max77693_irq>;
reg = <0x66>;