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Merge branch 'completely-rework-mediatek-mt7530-binding'
Arınç ÜNAL says: ==================== completely rework mediatek,mt7530 binding This patch series brings complete rework of the mediatek,mt7530 binding. The binding is checked with "make dt_binding_check DT_SCHEMA_FILES=mediatek,mt7530.yaml". If anyone knows the GIC bit for interrupt for multi-chip module MT7530 in MT7623AI SoC, let me know. I'll add it to the examples. If anyone got a Unielec U7623 or another MT7623AI board, please reach out. ==================== Link: https://lore.kernel.org/r/20220825082301.409450-1-arinc.unal@arinc9.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
@@ -4,67 +4,92 @@
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$id: http://devicetree.org/schemas/net/dsa/mediatek,mt7530.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT7530 Ethernet switch
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title: Mediatek MT7530 and MT7531 Ethernet Switches
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maintainers:
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- Sean Wang <sean.wang@mediatek.com>
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- Arınç ÜNAL <arinc.unal@arinc9.com>
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- Landen Chao <Landen.Chao@mediatek.com>
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- DENG Qingfang <dqfext@gmail.com>
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- Sean Wang <sean.wang@mediatek.com>
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description: |
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Port 5 of mt7530 and mt7621 switch is muxed between:
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1. GMAC5: GMAC5 can interface with another external MAC or PHY.
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2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
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of the SOC. Used in many setups where port 0/4 becomes the WAN port.
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Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to
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GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not
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connected to external component!
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There are two versions of MT7530, standalone and in a multi-chip module.
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Port 5 modes/configurations:
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1. Port 5 is disabled and isolated: An external phy can interface to the 2nd
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GMAC of the SOC.
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In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd
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GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!
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2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
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It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode
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and RGMII delay.
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3. Port 5 is muxed to GMAC5 and can interface to an external phy.
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Port 5 becomes an extra switch port.
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Only works on platform where external phy TX<->RX lines are swapped.
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Like in the Ubiquiti ER-X-SFP.
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4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port.
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Currently a 2nd CPU port is not supported by DSA code.
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MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,
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MT7620NN, MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs.
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Depending on how the external PHY is wired:
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1. normal: The PHY can only connect to 2nd GMAC but not to the switch
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2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as
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a ethernet port. But can't interface to the 2nd GMAC.
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MT7530 in MT7620AN, MT7620DA, MT7620DAN and MT7620NN SoCs has got 10/100 PHYs
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and the switch registers are directly mapped into SoC's memory map rather than
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using MDIO. The DSA driver currently doesn't support this.
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Based on the DT the port 5 mode is configured.
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There is only the standalone version of MT7531.
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Driver tries to lookup the phy-handle of the 2nd GMAC of the master device.
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When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2.
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phy-mode must be set, see also example 2 below!
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* mt7621: phy-mode = "rgmii-txid";
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* mt7623: phy-mode = "rgmii";
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Port 5 on MT7530 has got various ways of configuration.
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CPU-Ports need a phy-mode property:
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Allowed values on mt7530 and mt7621:
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- "rgmii"
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- "trgmii"
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On mt7531:
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- "1000base-x"
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- "2500base-x"
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- "rgmii"
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- "sgmii"
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For standalone MT7530:
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- Port 5 can be used as a CPU port.
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- PHY 0 or 4 of the switch can be muxed to connect to the gmac of the SoC
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which port 5 is wired to. Usually used for connecting the wan port
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directly to the CPU to achieve 2 Gbps routing in total.
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The driver looks up the reg on the ethernet-phy node which the phy-handle
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property refers to on the gmac node to mux the specified phy.
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The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the
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compatible string and the reg must be 1. So, for now, only gmac1 of an
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MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.
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Check out example 5 for a similar configuration.
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- Port 5 can be wired to an external phy. Port 5 becomes a DSA slave.
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Check out example 7 for a similar configuration.
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For multi-chip module MT7530:
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- Port 5 can be used as a CPU port.
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- PHY 0 or 4 of the switch can be muxed to connect to gmac1 of the SoC.
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Usually used for connecting the wan port directly to the CPU to achieve 2
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Gbps routing in total.
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The driver looks up the reg on the ethernet-phy node which the phy-handle
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property refers to on the gmac node to mux the specified phy.
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For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.
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Check out example 5.
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- In case of an external phy wired to gmac1 of the SoC, port 5 must not be
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enabled.
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In case of muxing PHY 0 or 4, the external phy must not be enabled.
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For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.
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Check out example 6.
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- Port 5 can be muxed to an external phy. Port 5 becomes a DSA slave.
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The external phy must be wired TX to TX to gmac1 of the SoC for this to
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work. Ubiquiti EdgeRouter X SFP is wired this way.
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Muxing PHY 0 or 4 won't work when the external phy is connected TX to TX.
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For the MT7621 SoCs, rgmii2 group must be claimed with gpio function.
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Check out example 7.
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properties:
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compatible:
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enum:
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- mediatek,mt7530
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- mediatek,mt7531
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- mediatek,mt7621
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oneOf:
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- description:
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Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC
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const: mediatek,mt7530
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- description:
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Standalone MT7531
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const: mediatek,mt7531
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- description:
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Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
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const: mediatek,mt7621
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reg:
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maxItems: 1
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@@ -79,7 +104,7 @@ properties:
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gpio-controller:
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type: boolean
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description:
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if defined, MT7530's LED controller will run on GPIO mode.
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If defined, MT7530's LED controller will run on GPIO mode.
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"#interrupt-cells":
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const: 1
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@@ -92,17 +117,21 @@ properties:
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io-supply:
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description:
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Phandle to the regulator node necessary for the I/O power.
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See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
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for details for the regulator setup on these boards.
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See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
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details for the regulator setup on these boards.
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mediatek,mcm:
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type: boolean
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description:
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if defined, indicates that either MT7530 is the part on multi-chip
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module belong to MT7623A has or the remotely standalone chip as the
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function MT7623N reference board provided for.
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Used for MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs which the MT7530
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switch is a part of the multi-chip module.
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reset-gpios:
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description:
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GPIO to reset the switch. Use this if mediatek,mcm is not used.
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This property is optional because some boards share the reset line with
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other components which makes it impossible to probe the switch if the
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reset line is used.
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maxItems: 1
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reset-names:
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@@ -110,8 +139,8 @@ properties:
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resets:
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description:
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Phandle pointing to the system reset controller with line index for
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the ethsys.
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Phandle pointing to the system reset controller with line index for the
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ethsys.
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maxItems: 1
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patternProperties:
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@@ -128,31 +157,97 @@ patternProperties:
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properties:
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reg:
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description:
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Port address described must be 5 or 6 for CPU port and from 0
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to 5 for user ports.
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Port address described must be 5 or 6 for CPU port and from 0 to 5
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for user ports.
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allOf:
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- $ref: dsa-port.yaml#
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- if:
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properties:
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label:
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items:
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- const: cpu
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const: cpu
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then:
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required:
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- reg
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- phy-mode
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properties:
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reg:
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enum:
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- 5
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- 6
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required:
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- compatible
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- reg
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$defs:
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mt7530-dsa-port:
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patternProperties:
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"^(ethernet-)?ports$":
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patternProperties:
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"^(ethernet-)?port@[0-9]+$":
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if:
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properties:
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label:
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const: cpu
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then:
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if:
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properties:
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reg:
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const: 5
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then:
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properties:
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phy-mode:
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enum:
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- gmii
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- mii
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- rgmii
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else:
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properties:
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phy-mode:
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enum:
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- rgmii
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- trgmii
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mt7531-dsa-port:
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patternProperties:
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"^(ethernet-)?ports$":
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patternProperties:
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"^(ethernet-)?port@[0-9]+$":
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if:
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properties:
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label:
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const: cpu
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then:
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if:
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properties:
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reg:
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const: 5
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then:
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properties:
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phy-mode:
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enum:
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- 1000base-x
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- 2500base-x
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- rgmii
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- sgmii
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else:
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properties:
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phy-mode:
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enum:
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- 1000base-x
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- 2500base-x
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- sgmii
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allOf:
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- $ref: "dsa.yaml#"
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- $ref: dsa.yaml#
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- if:
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required:
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- mediatek,mcm
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then:
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properties:
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reset-gpios: false
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required:
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- resets
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- reset-names
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@@ -163,52 +258,139 @@ allOf:
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- if:
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properties:
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compatible:
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items:
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- const: mediatek,mt7530
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const: mediatek,mt7530
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then:
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$ref: "#/$defs/mt7530-dsa-port"
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required:
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- core-supply
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- io-supply
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- if:
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properties:
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compatible:
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const: mediatek,mt7531
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then:
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$ref: "#/$defs/mt7531-dsa-port"
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properties:
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mediatek,mcm: false
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- if:
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properties:
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compatible:
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const: mediatek,mt7621
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then:
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$ref: "#/$defs/mt7530-dsa-port"
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required:
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- mediatek,mcm
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unevaluatedProperties: false
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examples:
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# Example 1: Standalone MT7530
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- |
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#include <dt-bindings/gpio/gpio.h>
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "mediatek,mt7530";
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reg = <0>;
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reset-gpios = <&pio 33 0>;
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core-supply = <&mt6323_vpa_reg>;
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io-supply = <&mt6323_vemc3v3_reg>;
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reset-gpios = <&pio 33 GPIO_ACTIVE_HIGH>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
|
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label = "lan0";
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label = "lan1";
|
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};
|
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port@1 {
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reg = <1>;
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label = "lan1";
|
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label = "lan2";
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};
|
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|
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port@2 {
|
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reg = <2>;
|
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label = "lan2";
|
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label = "lan3";
|
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};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
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port@4 {
|
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reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@6 {
|
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reg = <6>;
|
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label = "cpu";
|
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ethernet = <&gmac0>;
|
||||
phy-mode = "rgmii";
|
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|
||||
fixed-link {
|
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speed = <1000>;
|
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full-duplex;
|
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pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
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|
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# Example 2: MT7530 in MT7623AI SoC
|
||||
- |
|
||||
#include <dt-bindings/reset/mt2701-resets.h>
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7530";
|
||||
reg = <0>;
|
||||
|
||||
mediatek,mcm;
|
||||
resets = <ðsys MT2701_ETHSYS_MCM_RST>;
|
||||
reset-names = "mcm";
|
||||
|
||||
core-supply = <&mt6323_vpa_reg>;
|
||||
io-supply = <&mt6323_vemc3v3_reg>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
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#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
@@ -219,85 +401,219 @@ examples:
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
# Example 3: Standalone MT7531
|
||||
- |
|
||||
//Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4.
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <0>;
|
||||
|
||||
reset-gpios = <&pio 54 0>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
# Example 4: MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/mips-gic.h>
|
||||
#include <dt-bindings/reset/mt7621-reset.h>
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7621";
|
||||
reg = <0>;
|
||||
|
||||
mediatek,mcm;
|
||||
resets = <&sysc MT7621_RST_MCM>;
|
||||
reset-names = "mcm";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
# Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/mips-gic.h>
|
||||
#include <dt-bindings/reset/mt7621-reset.h>
|
||||
|
||||
ethernet {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "rgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii2_pins>;
|
||||
|
||||
gmac1: mac@1 {
|
||||
mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "rgmii-txid";
|
||||
phy-handle = <&phy4>;
|
||||
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&example5_ethphy4>;
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* Internal phy */
|
||||
phy4: ethernet-phy@4 {
|
||||
/* MT7530's phy4 */
|
||||
example5_ethphy4: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
mt7530: switch@1f {
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7621";
|
||||
reg = <0x1f>;
|
||||
mediatek,mcm;
|
||||
reg = <0>;
|
||||
|
||||
resets = <&rstctrl 2>;
|
||||
mediatek,mcm;
|
||||
resets = <&sysc MT7621_RST_MCM>;
|
||||
reset-names = "mcm";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan0";
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
/* Commented out. Port 4 is handled by 2nd GMAC.
|
||||
/* Commented out, phy4 is muxed to gmac1.
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan4";
|
||||
label = "wan";
|
||||
};
|
||||
*/
|
||||
|
||||
@@ -305,7 +621,7 @@ examples:
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
@@ -318,82 +634,171 @@ examples:
|
||||
};
|
||||
};
|
||||
|
||||
# Example 6: MT7621: mux external phy to SoC's gmac1
|
||||
- |
|
||||
//Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY.
|
||||
#include <dt-bindings/interrupt-controller/mips-gic.h>
|
||||
#include <dt-bindings/reset/mt7621-reset.h>
|
||||
|
||||
ethernet {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gmac_0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "rgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii2_pins>;
|
||||
|
||||
mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&example6_ethphy7>;
|
||||
};
|
||||
|
||||
mdio0: mdio-bus {
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* External phy */
|
||||
ephy5: ethernet-phy@7 {
|
||||
/* External PHY */
|
||||
example6_ethphy7: ethernet-phy@7 {
|
||||
reg = <7>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
switch@1f {
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7621";
|
||||
reg = <0x1f>;
|
||||
mediatek,mcm;
|
||||
reg = <0>;
|
||||
|
||||
resets = <&rstctrl 2>;
|
||||
mediatek,mcm;
|
||||
resets = <&sysc MT7621_RST_MCM>;
|
||||
reset-names = "mcm";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan0";
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan4";
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "lan5";
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&ephy5>;
|
||||
};
|
||||
|
||||
cpu_port0: port@6 {
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac_0>;
|
||||
phy-mode = "rgmii";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
# Example 7: MT7621: mux external phy to MT7530's port 5
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/mips-gic.h>
|
||||
#include <dt-bindings/reset/mt7621-reset.h>
|
||||
|
||||
ethernet {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii2_pins>;
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* External PHY */
|
||||
example7_ethphy7: ethernet-phy@7 {
|
||||
reg = <7>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7621";
|
||||
reg = <0>;
|
||||
|
||||
mediatek,mcm;
|
||||
resets = <&sysc MT7621_RST_MCM>;
|
||||
reset-names = "mcm";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "extphy";
|
||||
phy-mode = "rgmii-txid";
|
||||
phy-handle = <&example7_ethphy7>;
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "trgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
|
||||
Reference in New Issue
Block a user