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dt-bindings: phy: phy-stm32-usbphyc: add #clock-cells property

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usbphyc provides a unique clock called ck_usbo_48m.
STM32 USB OTG needs a 48Mhz clock (utmifs_clk48) for Full-Speed operation.
ck_usbo_48m is a possible parent clock for USB OTG 48Mhz clock.

ck_usbo_48m is available as soon as the PLL is enabled.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210208114659.15269-2-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Amelie Delaunay
2021-02-08 12:46:58 +01:00
committed by Vinod Koul
parent eb445a15fa
commit 12810cb9c2
1 changed files with 5 additions and 0 deletions
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5
Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
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@@ -51,6 +51,10 @@ properties:
vdda1v8-supply:
description: regulator providing 1V8 power supply to the PLL block
'#clock-cells':
description: number of clock cells for ck_usbo_48m consumer
const: 0
#Required child nodes:
patternProperties:
@@ -120,6 +124,7 @@ examples:
vdda1v8-supply = <&reg18>;
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <0>;
usbphyc_port0: usb-phy@0 {
reg = <0>;