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[ARM] S3C64XX: Mask the pll values correctly

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Correct the PLL field masks to ensure the PLL functions return the
right value.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Kyungmin Park
2008-11-25 17:05:22 +09:00
committed by Ben Dooks
parent e4ea803ab0
commit 11e3bd0923
1 changed files with 3 additions and 3 deletions
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6
arch/arm/plat-s3c64xx/include/plat/pll.h
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@@ -12,9 +12,9 @@
* published by the Free Software Foundation.
*/
#define S3C6400_PLL_MDIV_MASK ((1 << (25-16)) - 1)
#define S3C6400_PLL_PDIV_MASK ((1 << (13-8)) - 1)
#define S3C6400_PLL_SDIV_MASK ((1 << (2-0)) - 1)
#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
#define S3C6400_PLL_MDIV_SHIFT (16)
#define S3C6400_PLL_PDIV_SHIFT (8)
#define S3C6400_PLL_SDIV_SHIFT (0)