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synced 2026-05-03 11:12:01 -04:00
drm/amdgpu/sdma5: use common function to init sdma fw
Use common function to init sdma v5 firmware ucode. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -240,10 +240,7 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev)
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{
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const char *chip_name;
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char fw_name[40];
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int err = 0, i;
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struct amdgpu_firmware_info *info = NULL;
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const struct common_firmware_header *header = NULL;
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const struct sdma_firmware_header_v1_0 *hdr;
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int ret, i;
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if (amdgpu_sriov_vf(adev) && (adev->ip_versions[SDMA0_HWIP][0] == IP_VERSION(5, 0, 5)))
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return 0;
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@@ -272,38 +269,12 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev)
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sdma.bin", chip_name);
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else
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sdma1.bin", chip_name);
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err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev);
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if (err)
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goto out;
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err = amdgpu_ucode_validate(adev->sdma.instance[i].fw);
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if (err)
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goto out;
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hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data;
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adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
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adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
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if (adev->sdma.instance[i].feature_version >= 20)
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adev->sdma.instance[i].burst_nop = true;
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DRM_DEBUG("psp_load == '%s'\n",
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adev->firmware.load_type == AMDGPU_FW_LOAD_PSP ? "true" : "false");
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
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info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i];
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info->ucode_id = AMDGPU_UCODE_ID_SDMA0 + i;
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info->fw = adev->sdma.instance[i].fw;
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header = (const struct common_firmware_header *)info->fw->data;
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adev->firmware.fw_size +=
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ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);
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}
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ret = amdgpu_sdma_init_microcode(adev, fw_name, i, false);
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if (ret)
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return ret;
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}
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out:
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if (err) {
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DRM_ERROR("sdma_v5_0: Failed to load firmware \"%s\"\n", fw_name);
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for (i = 0; i < adev->sdma.num_instances; i++) {
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release_firmware(adev->sdma.instance[i].fw);
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adev->sdma.instance[i].fw = NULL;
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}
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}
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return err;
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return ret;
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}
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static unsigned sdma_v5_0_ring_init_cond_exec(struct amdgpu_ring *ring)
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@@ -1465,12 +1436,10 @@ static int sdma_v5_0_sw_fini(void *handle)
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int i;
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for (i = 0; i < adev->sdma.num_instances; i++) {
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release_firmware(adev->sdma.instance[i].fw);
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adev->sdma.instance[i].fw = NULL;
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for (i = 0; i < adev->sdma.num_instances; i++)
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amdgpu_ring_fini(&adev->sdma.instance[i].ring);
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}
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amdgpu_sdma_destroy_inst_ctx(adev, false);
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return 0;
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}
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@@ -89,33 +89,6 @@ static u32 sdma_v5_2_get_reg_offset(struct amdgpu_device *adev, u32 instance, u3
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return base + internal_offset;
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}
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static int sdma_v5_2_init_inst_ctx(struct amdgpu_sdma_instance *sdma_inst)
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{
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int err = 0;
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const struct sdma_firmware_header_v1_0 *hdr;
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err = amdgpu_ucode_validate(sdma_inst->fw);
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if (err)
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return err;
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hdr = (const struct sdma_firmware_header_v1_0 *)sdma_inst->fw->data;
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sdma_inst->fw_version = le32_to_cpu(hdr->header.ucode_version);
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sdma_inst->feature_version = le32_to_cpu(hdr->ucode_feature_version);
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if (sdma_inst->feature_version >= 20)
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sdma_inst->burst_nop = true;
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return 0;
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}
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static void sdma_v5_2_destroy_inst_ctx(struct amdgpu_device *adev)
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{
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release_firmware(adev->sdma.instance[0].fw);
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memset((void *)adev->sdma.instance, 0,
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sizeof(struct amdgpu_sdma_instance) * AMDGPU_MAX_SDMA_INSTANCES);
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}
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/**
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* sdma_v5_2_init_microcode - load ucode images from disk
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*
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@@ -132,9 +105,6 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev)
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{
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const char *chip_name;
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char fw_name[40];
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int err = 0, i;
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struct amdgpu_firmware_info *info = NULL;
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const struct common_firmware_header *header = NULL;
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DRM_DEBUG("\n");
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@@ -169,42 +139,7 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev)
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s.bin", chip_name);
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err = request_firmware(&adev->sdma.instance[0].fw, fw_name, adev->dev);
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if (err)
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goto out;
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err = sdma_v5_2_init_inst_ctx(&adev->sdma.instance[0]);
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if (err)
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goto out;
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for (i = 1; i < adev->sdma.num_instances; i++)
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memcpy((void *)&adev->sdma.instance[i],
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(void *)&adev->sdma.instance[0],
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sizeof(struct amdgpu_sdma_instance));
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if (amdgpu_sriov_vf(adev) && (adev->ip_versions[SDMA0_HWIP][0] == IP_VERSION(5, 2, 0)))
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return 0;
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DRM_DEBUG("psp_load == '%s'\n",
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adev->firmware.load_type == AMDGPU_FW_LOAD_PSP ? "true" : "false");
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
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for (i = 0; i < adev->sdma.num_instances; i++) {
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info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i];
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info->ucode_id = AMDGPU_UCODE_ID_SDMA0 + i;
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info->fw = adev->sdma.instance[i].fw;
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header = (const struct common_firmware_header *)info->fw->data;
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adev->firmware.fw_size +=
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ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);
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}
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}
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out:
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if (err) {
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DRM_ERROR("sdma_v5_2: Failed to load firmware \"%s\"\n", fw_name);
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sdma_v5_2_destroy_inst_ctx(adev);
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}
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return err;
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return amdgpu_sdma_init_microcode(adev, fw_name, 0, true);
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}
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static unsigned sdma_v5_2_ring_init_cond_exec(struct amdgpu_ring *ring)
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@@ -1406,7 +1341,7 @@ static int sdma_v5_2_sw_fini(void *handle)
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for (i = 0; i < adev->sdma.num_instances; i++)
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amdgpu_ring_fini(&adev->sdma.instance[i].ring);
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sdma_v5_2_destroy_inst_ctx(adev);
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amdgpu_sdma_destroy_inst_ctx(adev, true);
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return 0;
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}
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