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net: phy: Add support for the ADIN1140 PHY
Add a driver for the ADIN1140's internal 10BASE-T1S PHY. The device doesn't implement autonegotiation, so the link is always reported as being up. The device implements both C22 and C45 MDIO access methods, but can only be discovered over C22, since the C45 MMD devices lack the MDIO_DEVID1 and MDIO_DEVID2 registers. The indirect C45 over C22 feature is not supported. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Ciprian Regus <ciprian.regus@analog.com> Link: https://patch.msgid.link/20260708-adin1140-driver-v5-12-4aca7b51a58b@analog.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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committed by
Paolo Abeni
parent
85032df227
commit
0feaf415b7
@@ -1900,6 +1900,13 @@ S: Supported
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W: https://ez.analog.com/linux-software-drivers
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F: drivers/dma/dma-axi-dmac.c
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ANALOG DEVICES INC ETHERNET PHY DRIVERS
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M: Ciprian Regus <ciprian.regus@analog.com>
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L: netdev@vger.kernel.org
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S: Maintained
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W: https://ez.analog.com/linux-software-drivers
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F: drivers/net/phy/adin1140-phy.c
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ANALOG DEVICES INC IIO DRIVERS
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M: Nuno Sá <nuno.sa@analog.com>
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M: Michael Hennerich <Michael.Hennerich@analog.com>
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@@ -136,6 +136,12 @@ config ADIN1100_PHY
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Currently supports the:
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- ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY
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config ADIN1140_PHY
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tristate "Analog Devices ADIN1140 10BASE-T1S PHY"
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help
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Adds support for the Analog Devices, Inc. ADIN1140's internal
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10BASE-T1S PHY.
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config AMCC_QT2025_PHY
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tristate "AMCC QT2025 PHY"
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depends on RUST_PHYLIB_ABSTRACTIONS
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@@ -29,6 +29,7 @@ obj-y += $(sfp-obj-y) $(sfp-obj-m)
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obj-$(CONFIG_ADIN_PHY) += adin.o
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obj-$(CONFIG_ADIN1100_PHY) += adin1100.o
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obj-$(CONFIG_ADIN1140_PHY) += adin1140-phy.o
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obj-$(CONFIG_AIR_AN8801_PHY) += air_an8801.o
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obj-$(CONFIG_AIR_EN8811H_PHY) += air_en8811h.o
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obj-$(CONFIG_AIR_NET_PHYLIB) += air_phy_lib.o
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72
drivers/net/phy/adin1140-phy.c
Normal file
72
drivers/net/phy/adin1140-phy.c
Normal file
@@ -0,0 +1,72 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for Analog Devices, Inc. ADIN1140 10BASE-T1S PHY
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*
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* Copyright 2026 Analog Devices Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#define ADIN1140_PHY_ID 0x0283be00
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#define ADIN1140_PCS_CTRL 0x08f3
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#define ADIN1140_PCS_CTRL_LOOPBACK BIT(14)
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static int adin1140_config_aneg(struct phy_device *phydev)
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{
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/* phylib tries to clear BIT(12) in MDIO_CTRL1, since AN is disabled.
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* However, on the ADIN1140, that field is non-standard, being used
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* to control the reset status of the PHY (thus it needs to remain set).
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*/
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return 0;
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}
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static int adin1140_loopback(struct phy_device *phydev, bool enable, int speed)
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{
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if (enable && speed)
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return -EOPNOTSUPP;
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return phy_modify_mmd(phydev, MDIO_MMD_PCS, ADIN1140_PCS_CTRL,
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ADIN1140_PCS_CTRL_LOOPBACK,
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enable ? ADIN1140_PCS_CTRL_LOOPBACK : 0);
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}
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static int adin1140_read_status(struct phy_device *phydev)
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{
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phydev->link = 1;
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phydev->duplex = DUPLEX_HALF;
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phydev->speed = SPEED_10;
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phydev->autoneg = AUTONEG_DISABLE;
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return 0;
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}
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static struct phy_driver adin1140_driver[] = {
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{
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PHY_ID_MATCH_EXACT(ADIN1140_PHY_ID),
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.name = "ADIN1140_PHY",
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.features = PHY_BASIC_T1S_P2MP_FEATURES,
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.read_status = adin1140_read_status,
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.config_aneg = adin1140_config_aneg,
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.set_loopback = adin1140_loopback,
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.read_mmd = genphy_read_mmd_c45,
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.write_mmd = genphy_write_mmd_c45,
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.get_plca_cfg = genphy_c45_plca_get_cfg,
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.set_plca_cfg = genphy_c45_plca_set_cfg,
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.get_plca_status = genphy_c45_plca_get_status,
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},
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};
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module_phy_driver(adin1140_driver);
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static const struct mdio_device_id __maybe_unused adin1140_tbl[] = {
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{ PHY_ID_MATCH_EXACT(ADIN1140_PHY_ID) },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, adin1140_tbl);
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MODULE_DESCRIPTION("Analog Devices, Inc. ADIN1140 10BASE-T1S PHY");
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MODULE_AUTHOR("Ciprian Regus <ciprian.regus@analog.com>");
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MODULE_LICENSE("GPL");
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