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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-10 06:49:29 -04:00
drm/i915/pps: add vlv_ prefix to pps_pipe and active_pipe members
The pps_pipe and active_pipe members of struct intel_pps are only relevant on VLV/CHV. Prefix them with vlv_. Note that there are still a few cases where they're accessed on non-VLV/CHV paths. We'll fix them separately. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0e9a8998fc37796eb6f32692977859807222ce0a.1726681620.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
@@ -481,7 +481,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
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intel_wakeref_t wakeref;
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with_intel_pps_lock(intel_dp, wakeref)
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intel_dp->pps.active_pipe = INVALID_PIPE;
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intel_dp->pps.vlv_active_pipe = INVALID_PIPE;
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}
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}
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@@ -1277,7 +1277,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
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intel_wakeref_t wakeref;
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with_intel_pps_lock(intel_dp, wakeref)
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intel_dp->pps.active_pipe = vlv_active_pipe(intel_dp);
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intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp);
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}
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intel_pps_encoder_reset(intel_dp);
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@@ -1539,7 +1539,7 @@ struct intel_pps {
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* Pipe whose power sequencer is currently locked into
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* this port. Only relevant on VLV/CHV.
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*/
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enum pipe pps_pipe;
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enum pipe vlv_pps_pipe;
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/*
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* Power sequencer index. Only relevant on BXT+.
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@@ -1552,7 +1552,7 @@ struct intel_pps {
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* the use of the PPS for any pipe currentrly driving
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* external DP as that will mess things up on VLV.
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*/
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enum pipe active_pipe;
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enum pipe vlv_active_pipe;
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/*
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* Set if the sequencer may be reset due to a power transition,
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* requiring a reinitialization. Only relevant on BXT+.
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@@ -6638,7 +6638,7 @@ static void intel_edp_backlight_setup(struct intel_dp *intel_dp,
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pipe = vlv_active_pipe(intel_dp);
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if (pipe != PIPE_A && pipe != PIPE_B)
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pipe = intel_dp->pps.pps_pipe;
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pipe = intel_dp->pps.vlv_pps_pipe;
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if (pipe != PIPE_A && pipe != PIPE_B)
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pipe = PIPE_A;
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@@ -6867,8 +6867,8 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
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return false;
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intel_dp->reset_link_params = true;
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intel_dp->pps.pps_pipe = INVALID_PIPE;
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intel_dp->pps.active_pipe = INVALID_PIPE;
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intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
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intel_dp->pps.vlv_active_pipe = INVALID_PIPE;
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/* Preserve the current hw state. */
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intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
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@@ -6896,7 +6896,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
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intel_dp_set_default_max_sink_lane_count(intel_dp);
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if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
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intel_dp->pps.active_pipe = vlv_active_pipe(intel_dp);
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intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp);
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intel_dp_aux_init(intel_dp);
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intel_connector->dp.dsc_decompression_aux = &intel_dp->aux;
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@@ -33,7 +33,7 @@ static const char *pps_name(struct intel_dp *intel_dp)
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struct intel_pps *pps = &intel_dp->pps;
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if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
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switch (pps->pps_pipe) {
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switch (pps->vlv_pps_pipe) {
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case INVALID_PIPE:
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/*
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* FIXME would be nice if we can guarantee
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@@ -45,7 +45,7 @@ static const char *pps_name(struct intel_dp *intel_dp)
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case PIPE_B:
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return "PPS B";
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default:
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MISSING_CASE(pps->pps_pipe);
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MISSING_CASE(pps->vlv_pps_pipe);
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break;
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}
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} else {
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@@ -96,7 +96,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
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struct intel_display *display = to_intel_display(intel_dp);
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struct drm_i915_private *dev_priv = to_i915(display->drm);
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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enum pipe pipe = intel_dp->pps.pps_pipe;
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enum pipe pipe = intel_dp->pps.vlv_pps_pipe;
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bool pll_enabled, release_cl_override = false;
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enum dpio_phy phy = vlv_pipe_to_phy(pipe);
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enum dpio_channel ch = vlv_pipe_to_channel(pipe);
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@@ -182,18 +182,18 @@ static enum pipe vlv_find_free_pps(struct intel_display *display)
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if (encoder->type == INTEL_OUTPUT_EDP) {
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drm_WARN_ON(display->drm,
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intel_dp->pps.active_pipe != INVALID_PIPE &&
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intel_dp->pps.active_pipe !=
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intel_dp->pps.pps_pipe);
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intel_dp->pps.vlv_active_pipe != INVALID_PIPE &&
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intel_dp->pps.vlv_active_pipe !=
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intel_dp->pps.vlv_pps_pipe);
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if (intel_dp->pps.pps_pipe != INVALID_PIPE)
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pipes &= ~(1 << intel_dp->pps.pps_pipe);
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if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE)
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pipes &= ~(1 << intel_dp->pps.vlv_pps_pipe);
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} else {
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drm_WARN_ON(display->drm,
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intel_dp->pps.pps_pipe != INVALID_PIPE);
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intel_dp->pps.vlv_pps_pipe != INVALID_PIPE);
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if (intel_dp->pps.active_pipe != INVALID_PIPE)
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pipes &= ~(1 << intel_dp->pps.active_pipe);
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if (intel_dp->pps.vlv_active_pipe != INVALID_PIPE)
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pipes &= ~(1 << intel_dp->pps.vlv_active_pipe);
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}
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}
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@@ -215,11 +215,11 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
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/* We should never land here with regular DP ports */
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drm_WARN_ON(display->drm, !intel_dp_is_edp(intel_dp));
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drm_WARN_ON(display->drm, intel_dp->pps.active_pipe != INVALID_PIPE &&
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intel_dp->pps.active_pipe != intel_dp->pps.pps_pipe);
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drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE &&
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intel_dp->pps.vlv_active_pipe != intel_dp->pps.vlv_pps_pipe);
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if (intel_dp->pps.pps_pipe != INVALID_PIPE)
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return intel_dp->pps.pps_pipe;
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if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE)
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return intel_dp->pps.vlv_pps_pipe;
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pipe = vlv_find_free_pps(display);
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@@ -231,7 +231,7 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
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pipe = PIPE_A;
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vlv_steal_power_sequencer(display, pipe);
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intel_dp->pps.pps_pipe = pipe;
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intel_dp->pps.vlv_pps_pipe = pipe;
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drm_dbg_kms(display->drm,
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"picked %s for [ENCODER:%d:%s]\n",
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@@ -248,7 +248,7 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
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*/
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vlv_power_sequencer_kick(intel_dp);
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return intel_dp->pps.pps_pipe;
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return intel_dp->pps.vlv_pps_pipe;
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}
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static int
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@@ -327,19 +327,19 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
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/* try to find a pipe with this port selected */
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/* first pick one where the panel is on */
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intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(display, port,
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pps_has_pp_on);
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intel_dp->pps.vlv_pps_pipe = vlv_initial_pps_pipe(display, port,
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pps_has_pp_on);
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/* didn't find one? pick one where vdd is on */
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if (intel_dp->pps.pps_pipe == INVALID_PIPE)
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intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(display, port,
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pps_has_vdd_on);
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if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE)
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intel_dp->pps.vlv_pps_pipe = vlv_initial_pps_pipe(display, port,
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pps_has_vdd_on);
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/* didn't find one? pick one with just the correct port */
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if (intel_dp->pps.pps_pipe == INVALID_PIPE)
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intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(display, port,
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pps_any);
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if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE)
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intel_dp->pps.vlv_pps_pipe = vlv_initial_pps_pipe(display, port,
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pps_any);
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/* didn't find one? just let vlv_power_sequencer_pipe() pick one when needed */
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if (intel_dp->pps.pps_pipe == INVALID_PIPE) {
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if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) {
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drm_dbg_kms(display->drm,
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"[ENCODER:%d:%s] no initial power sequencer\n",
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dig_port->base.base.base.id, dig_port->base.base.name);
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@@ -462,7 +462,7 @@ void intel_pps_reset_all(struct intel_display *display)
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/*
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* We can't grab pps_mutex here due to deadlock with power_domain
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* mutex when power_domain functions are called while holding pps_mutex.
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* That also means that in order to use pps_pipe the code needs to
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* That also means that in order to use vlv_pps_pipe the code needs to
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* hold both a power domain reference and pps_mutex, and the power domain
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* reference get/put must be done while _not_ holding pps_mutex.
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* pps_{lock,unlock}() do these steps in the correct order, so one
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@@ -473,7 +473,7 @@ void intel_pps_reset_all(struct intel_display *display)
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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drm_WARN_ON(display->drm,
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intel_dp->pps.active_pipe != INVALID_PIPE);
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intel_dp->pps.vlv_active_pipe != INVALID_PIPE);
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if (encoder->type != INTEL_OUTPUT_EDP)
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continue;
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@@ -481,7 +481,7 @@ void intel_pps_reset_all(struct intel_display *display)
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if (DISPLAY_VER(display) >= 9)
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intel_dp->pps.pps_reset = true;
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else
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intel_dp->pps.pps_pipe = INVALID_PIPE;
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intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
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}
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}
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@@ -550,7 +550,7 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp)
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lockdep_assert_held(&display->pps.mutex);
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if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
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intel_dp->pps.pps_pipe == INVALID_PIPE)
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intel_dp->pps.vlv_pps_pipe == INVALID_PIPE)
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return false;
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return (intel_de_read(display, _pp_stat_reg(intel_dp)) & PP_ON) != 0;
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@@ -564,7 +564,7 @@ static bool edp_have_panel_vdd(struct intel_dp *intel_dp)
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lockdep_assert_held(&display->pps.mutex);
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if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
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intel_dp->pps.pps_pipe == INVALID_PIPE)
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intel_dp->pps.vlv_pps_pipe == INVALID_PIPE)
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return false;
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return intel_de_read(display, _pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD;
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@@ -1153,10 +1153,10 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp)
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{
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struct intel_display *display = to_intel_display(intel_dp);
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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enum pipe pipe = intel_dp->pps.pps_pipe;
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enum pipe pipe = intel_dp->pps.vlv_pps_pipe;
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i915_reg_t pp_on_reg = PP_ON_DELAYS(display, pipe);
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drm_WARN_ON(display->drm, intel_dp->pps.active_pipe != INVALID_PIPE);
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drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE);
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if (drm_WARN_ON(display->drm, pipe != PIPE_A && pipe != PIPE_B))
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return;
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@@ -1179,7 +1179,7 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp)
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intel_de_write(display, pp_on_reg, 0);
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intel_de_posting_read(display, pp_on_reg);
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intel_dp->pps.pps_pipe = INVALID_PIPE;
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intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
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}
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static void vlv_steal_power_sequencer(struct intel_display *display,
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@@ -1192,12 +1192,12 @@ static void vlv_steal_power_sequencer(struct intel_display *display,
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for_each_intel_dp(display->drm, encoder) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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drm_WARN(display->drm, intel_dp->pps.active_pipe == pipe,
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drm_WARN(display->drm, intel_dp->pps.vlv_active_pipe == pipe,
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"stealing PPS %c from active [ENCODER:%d:%s]\n",
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pipe_name(pipe), encoder->base.base.id,
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encoder->base.name);
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if (intel_dp->pps.pps_pipe != pipe)
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if (intel_dp->pps.vlv_pps_pipe != pipe)
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continue;
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drm_dbg_kms(display->drm,
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@@ -1219,10 +1219,10 @@ void vlv_pps_init(struct intel_encoder *encoder,
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lockdep_assert_held(&display->pps.mutex);
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drm_WARN_ON(display->drm, intel_dp->pps.active_pipe != INVALID_PIPE);
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drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE);
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if (intel_dp->pps.pps_pipe != INVALID_PIPE &&
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intel_dp->pps.pps_pipe != crtc->pipe) {
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if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE &&
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intel_dp->pps.vlv_pps_pipe != crtc->pipe) {
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/*
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* If another power sequencer was being used on this
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* port previously make sure to turn off vdd there while
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@@ -1237,13 +1237,13 @@ void vlv_pps_init(struct intel_encoder *encoder,
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*/
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vlv_steal_power_sequencer(display, crtc->pipe);
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intel_dp->pps.active_pipe = crtc->pipe;
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intel_dp->pps.vlv_active_pipe = crtc->pipe;
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if (!intel_dp_is_edp(intel_dp))
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return;
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/* now it's all ours */
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intel_dp->pps.pps_pipe = crtc->pipe;
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intel_dp->pps.vlv_pps_pipe = crtc->pipe;
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drm_dbg_kms(display->drm,
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"initializing %s for [ENCODER:%d:%s]\n",
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