arm64: dts: renesas: r8a779h0: gray-hawk-single: Enable PCIe Host

Enable PCIe Host controller on R-Car V4M Gray Hawk board.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240904003409.1578212-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Yoshihiro Shimoda
2024-09-04 09:34:09 +09:00
committed by Geert Uytterhoeven
parent 0270dbe4f8
commit 0f9752bace

View File

@@ -126,6 +126,12 @@ memory@480000000 {
reg = <0x4 0x80000000 0x1 0x80000000>;
};
pcie_clk: clk-9fgv0841-pci {
compatible = "fixed-clock";
clock-frequency = <100000000>;
#clock-cells = <0>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@@ -240,6 +246,17 @@ &i2c0 {
status = "okay";
clock-frequency = <400000>;
io_expander_a: gpio@20 {
compatible = "onnn,pca9654";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
eeprom@50 {
compatible = "rohm,br24g01", "atmel,24c01";
label = "cpu-board";
@@ -309,6 +326,18 @@ &mmc0 {
status = "okay";
};
&pcie0_clkref {
compatible = "gpio-gate-clock";
clocks = <&pcie_clk>;
enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
/delete-property/ clock-frequency;
};
&pciec0 {
reset-gpios = <&io_expander_a 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pfc {
pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
pinctrl-names = "default";