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drm/nouveau/mmu/tu102: Add support for compressed kinds
Allow compressed PTE kinds to be written into PTEs when GSP-RM is present, rather than reverting to their non-compressed versions. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Signed-off-by: Mohamed Ahmed <mohamedahmedegypt2001@gmail.com> Signed-off-by: Mary Guillemard <mary@mary.zone> Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: James Jones <jajones@nvidia.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patch.msgid.link/20251110-nouveau-compv6-v6-4-83b05475f57c@mary.zone
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@@ -109,12 +109,34 @@ gp100_vmm_pgt_pfn(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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nvkm_done(pt->memory);
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}
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static inline u64
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gp100_vmm_comptag_nr(u64 size)
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{
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return size >> 16; /* One comptag per 64KiB VRAM. */
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}
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static inline u64
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gp100_vmm_pte_comptagline_base(u64 addr)
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{
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/* RM allocates enough comptags for all of VRAM, so use a 1:1 mapping. */
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return (1 + gp100_vmm_comptag_nr(addr)) << 36; /* NV_MMU_VER2_PTE_COMPTAGLINE */
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}
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static inline u64
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gp100_vmm_pte_comptagline_incr(u32 page_size)
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{
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return gp100_vmm_comptag_nr(page_size) << 36; /* NV_MMU_VER2_PTE_COMPTAGLINE */
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}
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static inline void
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gp100_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr)
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{
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u64 data = (addr >> 4) | map->type;
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if (map->ctag)
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data |= gp100_vmm_pte_comptagline_base(addr);
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while (ptes--) {
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VMM_WO064(pt, vmm, ptei++ * 8, data);
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data += map->next;
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@@ -195,6 +217,9 @@ gp100_vmm_pd0_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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{
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u64 data = (addr >> 4) | map->type;
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if (map->ctag)
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data |= gp100_vmm_pte_comptagline_base(addr);
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while (ptes--) {
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VMM_WO128(pt, vmm, ptei++ * 0x10, data, 0ULL);
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data += map->next;
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@@ -440,9 +465,26 @@ gp100_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc,
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return -EINVAL;
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}
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/* Handle compression. */
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if (kindm[kind] != kind) {
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/* Revert to non-compressed kind. */
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kind = kindm[kind];
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struct nvkm_device *device = vmm->mmu->subdev.device;
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/* Compression is only supported when using GSP-RM, as
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* PMU firmware is required in order to initialise the
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* compbit backing store.
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*/
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if (nvkm_gsp_rm(device->gsp)) {
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/* Turing GPUs require PTE_COMPTAGLINE to be filled,
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* in addition to specifying a compressed kind.
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*/
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if (device->card_type < GA100) {
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map->ctag = gp100_vmm_pte_comptagline_incr(1 << map->page->shift);
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map->next |= map->ctag;
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}
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} else {
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/* Revert to non-compressed kind. */
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kind = kindm[kind];
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}
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}
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map->type |= BIT(0);
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