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ARM: dts: imx6qdl-icore-rqs: Add CAN nodes

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Add support for can1 and can2 nodes on Engicam i.CoreM6 RQS
QDL module boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Jagan Teki
2017-09-18 16:58:33 +05:30
committed by Shawn Guo
parent c983a9137e
commit 0ec7a7d337
1 changed files with 28 additions and 0 deletions
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28
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
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@@ -173,6 +173,20 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT1_SSI0)
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1>;
xceiver-supply = <&reg_3p3v>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2>;
xceiver-supply = <&reg_3p3v>;
status = "okay";
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
@@ -328,6 +342,20 @@ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>;
};
pinctrl_can1: can1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020
>;
};
pinctrl_can2: can2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1